
AD5934
Rev. A | Page 27 of 40
WRITING/READING TO THE AD5934
The I
2
C interface specification defines several different protocols
for different types of read and write operations. This section
describes the protocols used in the AD5934. The figures in this
section use the abbreviations shown in Table 14.
Table 14. I
2
C Abbreviation Table
Abbreviation Condition
S Start
P Stop
R Read
W Write
A Acknowledge
A
No acknowledge write byte/command byte
User Command Codes
The command codes in Table 15 are used for reading/writing to
the interface. They are explained in detail in this section but are
grouped within Table 15 for easy reference.
Table 15. Command Codes
Command
Code
Code
Name Code
Description
1010 0000
Block
Write
This command is used when writing
multiple bytes to the RAM; see the
Block Write section.
1010 0001
Block
Read
This command is used when reading
multiple bytes from RAM/memory; see
the Block Read section.
1011 0000
Address
Pointer
This command enables the user to set
the address pointer to any location in
the memory; the data contains the
address of the register to which the
pointer should be pointing.
Write Byte/Command Byte
In this operation, the master device sends a byte of data to the
slave device. The write byte can either be a data byte write to a
Register Address or it can be a command operation. To write data
to a register, the command sequence is as follows (see Figure 32):
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
4.
The master sends a register address.
5.
The slave asserts an acknowledge on SDA.
6.
The master sends a data byte.
7.
The slave asserts an acknowledge on SDA.
8.
The master asserts a stop condition on SDA to end the
transaction.
S
SLAVE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
A
W
A
A
P
0
532
5-
04
9
Figure 32. Writing Register Data to Register Address
In the AD5934, the write byte protocol is also used to set a
pointer to a register address (see Figure 33). This protocol is
used for a subsequent single-byte read from the same address,
block read, or block write starting at that address.
To set a register pointer, the following sequence is applied:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
4.
The master sends a pointer command code (see Table 15, an
address pointer = 1011 0000).
5.
The slave asserts an acknowledge on SDA.
6.
The master sends a data byte (a register address to where
the pointer is to point).
7.
The slave asserts an acknowledge on SDA.
8.
The master asserts a stop condition on SDA to end the
transaction.
S
A
W
A
POINTER
COMMAND
1011 0000
SLAVE
ADDRESS
REGISTER
ADDRESS
TO POINT TO
05
32
5-
05
0
A
P
Figure 33. Setting Address Pointer to Register Address
BLOCK WRITE
In this operation, the master device writes a block of data to a
slave device (see Figure 34). The start address for a block write
must previously have been set. In the case of the AD5934, this is
done by setting a pointer to set the register address.
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
4.
The master sends an 8-bit command code (1010 0000) that
tells the slave device to expect a block write.
5.
The slave asserts an acknowledge on SDA.
6.
The master sends a data byte that tells the slave device the
number of data bytes to be sent to it.
7.
The slave asserts an acknowledge on SDA.
8.
The master sends the data bytes.
9.
The slave asserts an acknowledge on SDA after each data byte.
10.
The master asserts a stop condition on SDA to end the
transaction.
A
A
A
A
S
W
A
P
SLAVE
ADDRESS
BLOCK
WRITE
NUMBER
BYTES WRITE
BYTE 0
BYTE 1
BYTE 2
05
32
5
-05
1
A
Figure 34. Writing a Block Write
Содержание AD5934
Страница 35: ...AD5934 Rev A Page 35 of 40 SCHEMATICS 05325 144 Figure 40 EVAL AD5934EBZ USB Schematic ...
Страница 36: ...AD5934 Rev A Page 36 of 40 05325 145 Figure 41 EVAL AD5934EBZ Schematic ...
Страница 37: ...AD5934 Rev A Page 37 of 40 05325 146 Figure 42 Linear Regulator on EVAL AD5934EBZ ...
Страница 38: ...AD5934 Rev A Page 38 of 40 05325 147 Figure 43 Decoupling on the EVAL AD5934EBZ ...