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BIOS
Page 4-11
CPU & PCI Bus Control
Scroll to CPU & PCI Bus Control and press <Enter>. The following screen
appears:
PCI1/2 Master 0 WS Write
When Enabled, Writes to the PCI bus are commanded with zero wait states.
Options: Enabled, Disabled.
PCI1/2 Post Write
Enables CPU to PCI bus POST write.
Options: Enabled, Disabled.
VLink 8X Support
Enables VLink 8X support.
Options: Enabled, Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions
cycles. Select Enabled to support compliance with PCI specification version 2.2.
Options: Enabled, Disabled.
Содержание KT600
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Страница 13: ...Introduction Page 1 7 Figure 5 System Block Diagram System Block Diagram...
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Страница 19: ...Installation Page 3 1 Section 3 INSTALLATION...
Страница 20: ...Installation Page 3 2 Mainboard Layout Figure 1...
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Страница 72: ...Drivers Installation Page 5 8 Page Left Blank...
Страница 80: ...Appendix C 2 Page Left Blank...