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Figure 9: Factory build restoration page

11. Load "*\software_examples\factory_images\m10_fpga_html.zip" in "Webpages File Name"

column and "*\software_examples\factory_images\ext_flash.flash" in "Software File Name"
column and then upload them

Figure 10: Raw page for factory recovery

12. Check whether it uploads successfully or not
13. Power cycle the board again
14. Type "nios2-terminal;" in NIOS command shell again to check whether it can get IP

address as expected

15. Launch IE and type its IP address in the address bar to see whether the webpage is

working or not

Note:
1)  n* stands  for USB cable number,  e.g. "cable 1"
2)  Dual-boot  images:



Dual compressed image #0: BUP A build



Dual compressed image #1: GPIO (bts_config) build which is also available on Design
Store



Please turn to the "Selecting the Internal Configuration Scheme" section of the User
Guide for Dual Configuration feature

3) Ethernet Port A is used by the factory BUP build by default

Содержание Max10 FPGA

Страница 1: ...s described at www altera com common legal html Altera warrants performance of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right...

Страница 2: ...Revision history Version Author Date Changes Reason 1 0 Martin Chen 6 1 2015 Initial release...

Страница 3: ...w 4 Theory of Operation 5 Simple Demo Setup 6 How to recompile the hardware build 8 Convert SOF file to POF file 9 How to recompile the software build 10 Convert NIOS executable file to flash file 11...

Страница 4: ...ler for more details about BUP design The following external parts are needed to demonstrate the design example 1 MAX10 10M50DA FPGA Development kit 2 Mini USB cable for programming MAX 10 device 3 Qu...

Страница 5: ...ion Memory Figure 2 BUP design example block diagram The Nios II processor is used to implement a web server in MAX 10 FPGA device Please see application note AN429 Remote Configuration Over Ethernet...

Страница 6: ...eft of the kit 3 Connect Ethernet cable to Ethernet port A the bottom one Figure 3 BUP test platform 4 Open NIOS command shell and change to project root directory 5 Type nios2 configure sof cable 1 d...

Страница 7: ...Figure 4 Link establishment and IP address acquirement...

Страница 8: ...AX10 FPGA device with the m10_rgmii BUP demo design 1 Launch Quartus II software and open the project top qpf using File Open Project 2 Compile the project by clicking the button 3 Launch the Quartus...

Страница 9: ...ration feature please turn to the Selecting the Internal Configuration Scheme section of the User Guide for more details 1 Launch Quartus II software and open the Convert Programming File tool 2 Selec...

Страница 10: ...Open NIOS command shell v15 0 0 145 or later and change to the BSP directory BUP Root Directory software_examples bsp b Type in the command make c Change to the directory BUP Root Directory software_...

Страница 11: ...000 input ELF_FILE_LOCATION output FLASH_FILE boot SOPC_KIT_NIOS2 components altera_nios2 boot_loader_cfi srec Note 1 Base offset address and end offset address are the QSPI flash addresses assigned i...

Страница 12: ...4 Power cycle the board or push S5 button to boot up from BUP build BUP A 5 Open NIOS command shell at altera 15 0 nios2eds e g double click Nios II Command Shell bat 6 Change directory to software_ex...

Страница 13: ...2 terminal in NIOS command shell again to check whether it can get IP address as expected 15 Launch IE and type its IP address in the address bar to see whether the webpage is working or not Note 1 n...

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