Alpha Data ADM-XRC-7V1, Руководство пользователя

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ADM-XRC-7V1 User Manual
V1.9 - 23rd Aug 2016
3.10 Memory Interfaces
The ADM-XRC-7V1 has four independent banks of DDR3 SDRAM. Each bank consists of two 16 bit wide
memory devices in parallel to provide a 32 bit datapath capable of running up to 800MHz (DDR-1600). 2Gb
devices (Micron MT41J64M16-187E) are fitted as standard to provide 512MB per bank. 4Gb (giving 1GB per
bank) are available as an ordering option.
The memory banks are arranged for compatibility with the Xilinx Memory Interface Generator (MIG). DRAM
Banks Shows the component references and FPGA banks used. Full details of the interface, signaling standards
and an example design are provided in the SDK.
Virtex 7
Bank
39
Bank
38
Bank
37
Bank
36
Bank
35
Bank
34
Bank
19
Bank
18
DRAM Bank 0 DRAM Bank 1
DRAM Bank 2 DRAM Bank 3
200MHz
REFCLK
Figure 8 : DRAM Banks
FPGA Speed Grade
Single Rank
(2GB-8GB)
-3 1600
-2/-2L/-2G 1600
-1 1600
-1M 1066
Table 15 : Maximum Memory Speeds
Page 19 Functional Description
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