KINTEX-7 FPGA Development Board AV7K325 User Manual
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Through this diagram, you can see the interfaces and functions that the
AV7K325 FPGA Development Board contains:
FPGA Core Board
The smallest system consisting of X 4 DDR3 + QSPI FLASH,
there are two crystal oscillators to provide the clock, a single-ended
200MHz crystal oscillator provides the DDR control reference clock of
the FPGA logic, and the other differential 125MHz crystal oscillator
provides the GTX transceiver reference clock.
PCIe x8 interface
It supports the PCI Express 2.0 standard, provides a standard PCIe x8
high-speed data transmission interface, and the single-channel
communication rate can be as high as 5GBaud.
4 SFP interfaces
The four high-speed transceivers of the GTX transceiver of the FPGA
are connected to the transmission and reception of four optical modules
to realize four high-speed optical fiber communication interfaces. Each
fiber optic data communication receives and transmits at speeds of up
to 10 Gb/s.
HDMI Video Output Interface
For 2 HDMI video output interfaces, we chose the SiI9136 HDMI
encoding chip from LATTICE, which supports up to 4K@30Hz output
and 3D output.
HDMI Video Input Interface
With 2 HDMI video input interfaces, we chose the ADV7619 HDMI
decoder chip from ANALOG DEIVCE, which supports up to 4K@30Hz
input and data input in different formats.
SATA interface
Reserve 2 high-speed SATA interfaces, which are directly connected to
the GTX transceiver of XC7K325