Alinco DR-620, Руководство по обслуживанию

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16) UHF PLL
A portion of the output from the UHF VCO Q29 (2SK508) passes through buffer amplifier Q28 (2SC5066)
and Q39 (2SC5066) to the programmable divider section of the PLL IC IC2 (M64076AGP), which
divides the frequency according to the frequency dividing data from the main PU IC2. It is then sent to
the phase comparator.
The 21.25 MHz frequency of the reference oscillator circuit, made up of TCX0 X1, is divided by the
reference frequency divider section of IC2 into 4250 or 3400 parts to become 5 kHz or 6.25kHz
comparative reference frequencies, which are utilized by the phase comparator.
The phase comparator section of IC2 compares the phase between the frequency-divided oscillation
frequency of the VCO circuit and comparative frequency, and its output is a pulse corresponding to the
phase difference.
This pulse is integrated by the charge pump and loop filter of IC2 into a control voltage (VCV) to
control the oscillation frequency of the UHF VCO Q29.
17) Power-on Circuit
When the POWER switch is turned on, pin 18 of man CPU IC19 goes “low.” When pin 18 of IC19 goes
“low,” pin 79 of IC19 goes “high” to activate the power switches Q63 (2SB1386) and Q74 (2SC4081),
which supply the DC power to the radio.
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