compares the phase of the frequency from the VCO with that of the comparison frequency, 5 or 6.25kHz,
which is obtained by the internal divider in IC501.
4. PLL Loop Filter Circuit
If a phase difference is found in the phase comparison between the reference frequency and VCO output
frequency, the charge pump output (pin 13) of IC501 generates a pulse signal, which is converted to DC
voltage by the PLL loop filter and input to the varicap of the VCO unit for oscillation frequency control.
5. VCO Circuit A Colpitts oscillation circuit driven by Q503 directly oscillates the desired frequency. The
frequency control voltage determined in the CPU (IC1) and PLL circuit is input to the varicaps (D503 and
D504). This change the oscillation frequency, which is amplified by the VCO buffer (Q504) and output
from the VCO area.
4) CPU and Peripheral Circuits
1. LCD Display Circuit
The CPU turns ON the LCD via segment and common terminals with 1/4 the duty and 1/3 the bias, at the
frame frequency is 64Hz.
2. Dimmer Circuit
The dimmer circuit makes the output of pin 13 of CPU (IC1) into "H" level at set mode, so that Q9 and Q3
will turn ON to make the lamp control resistor R84 short and make its illumination bright. But on the other
hand, if the dimmer circuit makes pin 13 into "L" level, Q9 and Q3 will turn OFF, R84's illumination will
become dimmer as its hang on voltage falls down in the working LED (D11, D2, D5, D3 and D6).
3. Reset and Backup
When the power form the DC cable increases from Circuits 0 V to 2.5 or more, "H" level reset signal is
output form the reset IC (IC4) to pin 33 of the CPU (IC1), causing the CPU to reset. The reset signal,
however, waits at 100, and does not enter the CPU until the CPU clock (X1) has stabilized.
4. S(Signal) Meter Circuit
The DC potential of pin 16 of IC106 is input to pin 1 of the CPU (IC1), converted from an analog to a
digital signal, and displayed as the S-meter signal on the LCD.
5. DTMF Encoder
The CPU (IC1) is equipped with an internal DTMF encoder. The DTMF signal is output from pin 10,
through R35, R34 and R261 (for level adjustment), and then through the microphone amplifier (IC114:A),
and is sent to the varicap of the VCO for modulation. At the same time, the monitoring tone passes through
the AF circuit and is output form the speaker.
6. Tone Encoder
The CPU (IC1) is equipped with an internal tone encoder. The tone signal (67.0 to 250.3 Hz) is output
from pin 9 of the CPU to the varicap (D503 and D504) of the VCO for modulation.
Содержание DR-235T
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