Alesis E-DRUM TOTAL, Руководство по обслуживанию

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Circuit Boards
2 - ALL CAPACITANCE VALUES ARE INDICATED IN "F". ( U = 0.000001F; P = 0.000001UF. ) 1 - ALL RESISTANCE VALUES ARE INDICATED IN "ohm". (K = 1,000ohm; M = 1,000,000ohm. )
REMARK :
ARM_SDRAM
PCM_FLASH
SPI_FLASH
1
VDD
2
DQ0
3
VDDQ
4
DQ1
5
DQ2
6
VSSQ
7
DQ3
8
DQ4
9
VDDQ
10
DQ5
11
DQ6
12
VSSQ
13
DQ7
14
VDD
15
DQML
16
/WE
17
/CAS
18
/RAS
19
/CS
20
BA0
21
BA1
22
A10
23
A0
24
A1
25
A2
26
A3
27
VDD
28
VSS
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
35
A11
36
A12
37
CKE
38
CLK
39
DQMH
40
NC
41
VSS
42
DQ8
43
VDDQ
44
DQ9
45
DQ10
46
VSSQ
47
DQ11
48
DQ12
49
VDDQ
50
DQ13
51
DQ14
52
VSSQ
53
DQ15
54
VSS
U21
MT48LC8M16
1
#CE
2
SO
3
#WP
7
#HOLD
6
SCK
5
SI
4
GND
8
VCC
U25
MX25L4006EM2I
C109 0.1uF
C110 0.1uF
C111 0.1uF
C112 0.1uF
C113 0.1uF
R78 10K
C64 0.1uF
C135 0.1uF
C136 0.1uF
C139 0.1uF
C140 0.1uF
C141 0.1uF
C142 0.1uF
C143 0.1uF
1
A23
2
A22
3
A15
4
A14
5
A13
6
A12
7
A11
8
A10
9
A9
10
A8
11
A19
12
A20
13
WE
14
RESET
15
A21
16
WP
17
RY/BY
18
A18
19
A17
20
A7
21
A6
22
A5
23
A4
24
A3
25
A2
26
A1
27
NC
28
NC
29
VIO
30
NC
31
A0
32
CE
33
VSS
34
OE
35
D0
36
D8
37
D1
38
D9
39
D2
40
D10
41
D3
42
D11
43
VCC
44
D4
45
D12
46
D5
47
D13
48
D6
49
D14
50
D7
51
D15
52
VSS
53
BYTE
54
A16
55
A25
56
A24
U20
SIC-TSOP56-S29GL512
TP1 TP2 TP3
TP4
C114 0.1uF
C115 0.1uF
C116 0.1uF
C117 0.1uF
C118 0.1uF
R13 10K
R14
10K
R28 0
R29 10K
C38
0.1uF
1
VDD
2
DQ0
3
VDDQ
4
DQ1
5
DQ2
6
VSSQ
7
DQ3
8
DQ4
9
VDDQ
10
DQ5
11
DQ6
12
VSSQ
13
DQ7
14
VDD
15
DQML
16
/WE
17
/CAS
18
/RAS
19
/CS
20
BA0
21
BA1
22
A10
23
A0
24
A1
25
A2
26
A3
27
VDD
28
VSS
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
35
A11
36
A12
37
CKE
38
CLK
39
DQMH
40
NC
41
VSS
42
DQ8
43
VDDQ
44
DQ9
45
DQ10
46
VSSQ
47
DQ11
48
DQ12
49
VDDQ
50
DQ13
51
DQ14
52
VSSQ
53
DQ15
54
VSS
U8
MT48LC8M16
M17
MISO/RX1/GPIO0[16]
M16
MOSI/TX1/GPIO0[17]
M15
SPI_CS/RX2/GPIO0[18]
M14
SPI_CLK/TX2/GPIO0[19]
U1-P
A5-289_NEW
R5
ARM_D[00]
N6
ARM_D[01]
T4
ARM_D[02]
U3
ARM_D[03]
T3
ARM_D[04]
R4
ARM_D[05]
P5
ARM_D[06]
U2
ARM_D[07]
U1
ARM_D[08]
T2
ARM_D[09]
M4
ARM_D[10]
R3
ARM_D[11]
T1
ARM_D[12]
R2
ARM_D[13]
P3
ARM_D[14]
M5
ARM_D[15] U1-D
A5-289_NEW
K2
ARM_A[00]
K3
ARM_A[01]
J5
ARM_A[02]
H4
ARM_A[03]
J1
ARM_A[04]
J2
ARM_A[05]
J3
ARM_A[06]
H5
ARM_A[07]
H1
ARM_A[08]
H2
ARM_A[09]
G1
ARM_A[10]
G2
ARM_A[11]
H3
ARM_A[12]
U1-C
A5-289_NEW
L4
ARM_D[16]/GPIO3[00]
R1
ARM_D[17]/GPIO3[01]
P2
ARM_D[18]/GPIO3[02]
N3
ARM_D[19]/GPIO3[03]
P1
ARM_D[20]/GPIO3[04]
L5
ARM_D[21]/GPIO3[05]
K4
ARM_D[22]/GPIO3[06]
N2
ARM_D[23]/GPIO3[07]
N1
ARM_D[24]/GPIO3[08]/MPU_D[8]
M3
ARM_D[25]/GPIO3[09]/MPU_D[9]
K5
ARM_D[26]/GPIO3[10]/MPU_D[10]
M2
ARM_D[27]/GPIO3[11]/MPU_D[11]
M1
ARM_D[28]/GPIO3[12]/MPU_D[12]
J4
ARM_D[29]/GPIO3[13]/MPU_D[13]
L3
ARM_D[30]/GPIO3[14]/MPU_D[14]
L2
ARM_D[31]/GPIO3[15]/MPU_D[15]
U1-E
A5-289_NEW
P6
ARM_WR/GPIO3[16]/BOOT[0]
U4
ARM_RD/GPIO3[17]/BOOT[1]
T5
ARM_CS/GPIO3[18]
U5
ARM_SDRAM_CS
G5
ARM_SDRAM_CKE
G3
ARM_SDRAM_CLK_IN
G4
ARM_SDRAM_CLK
N4
ARM_SDRAM_CAS
N5
ARM_SDRAM_RAS
P4
ARM_SDRAM_WE
T6
ARM_SDRAM_DQM0
R6
ARM_SDRAM_DQM[1]
N7
ARM_SDRAM_DQM[2]/GPIO3[19]
U6
ARM_SDRAM_DQM[3]/GPIO3[20]
K1
ARM_SDRAM_B[1]
L1
ARM_SDRAM_B[0] U1-B
A5-289_NEW
U14
PCM_A[00]
R11
PCM_A[01]
T13
PCM_A[02]
P11
PCM_A[03]
N11
PCM_A[04]
T12
PCM_A[05]
U13
PCM_A[06]
U12
PCM_A[07]
T11
PCM_A[08]
R10
PCM_A[09]
P10
PCM_A[10]
N10
PCM_A[11]
U11
PCM_A[12]
T10
PCM_A[13]
U10
PCM_A[14]
R9
PCM_A[15]
T9
PCM_A[16]
U9
PCM_A[17]
P9
PCM_A[18]
N9
PCM_A[19]
U8
PCM_A[20]
T8
PCM_A[21]
R8
PCM_A[22]
P8
PCM_A[23]
N8
PCM_A[24]
P7
PCM_A[25]
T7
PCM_A[26]
R7
PCM_A[27]
U7
PCM_A[28]
U1-H
A5-289_NEW
T16
PCM_D00
R15
PCM_D01
U16
PCM_D02
P14
PCM_D03
N14
PCM_D04
R14
PCM_D05
N13
PCM_D06
R13
PCM_D07
M13
PCM_D08
T15
PCM_D09
P13
PCM_D10
R12
PCM_D11
P12
PCM_D12
U15
PCM_D13
N12
PCM_D14
T14
PCM_D15 U1-G
A5-289_NEW
U17
PCM_SDRAM_CLK
R17
PCM_SDRAM_CKE
P16
PCM_SDRAM_WE
N16
PCM_SDRAM_CS
N17
PCM_SDRAM_CAS
P17
PCM_SDRAM_RAS
N15
PCM_CS
P15
PCM_WR
R16
PCM_RD
T17
PCM_SDRAM_CLK_IN
U1-F
A5-289_NEW
M6
VCC_MEM
M7
VCC_MEN
M8
VCC_MEM
M9
VCC_MEM
L6
VCC_MEM
L7
VCC_MEM
L8
VCC_MEM
L9
VCC_MEM
U1-R
A5-289_NEW
ARM_D[00:31]
ARM_D16 ARM_D17 ARM_D18 ARM_D19 ARM_D20 ARM_D21 ARM_D22 ARM_D23 ARM_D24 ARM_D25 ARM_D26 ARM_D27 ARM_D28 ARM_D29 ARM_D30 ARM_D31
ARM_SDRAM_CLK ARM_SDRAM_DQM1 ARM_SDRAM_DQM0
ARM_SDRAM_CLK ARM_SDRAM_DQM3 ARM_SDRAM_DQM2
+3.3VD
ARM_A[00:12]
ARM_A00 ARM_A01 ARM_A02 ARM_A03 ARM_A04 ARM_A05 ARM_A06 ARM_A07 ARM_A08 ARM_A09 ARM_A10 ARM_A11 ARM_A12
ARM_SDRAM_B0 ARM_SDRAM_B1 ARM_SDRAM_WE
ARM_SDRAM_CAS ARM_SDRAM_RAS
ARM_SDRAM_CS
ARM_SDRAM_CKE
ARM_SDRAM_CKE
ARM_SDRAM_CS
ARM_SDRAM_RAS ARM_SDRAM_CAS
ARM_SDRAM_WE ARM_SDRAM_B1 ARM_SDRAM_B0
+3.3VD
SPI_CS/RX2/GPIO0[18]
MISO/RX1/GPIO0[16]
SPI_CLK/TX2/GPIO0[19] MOSI/TX1/GPIO0[17]
+3.3VD
+3.3VD
ARM_A00 ARM_A01 ARM_A02 ARM_A03 ARM_A04 ARM_A05 ARM_A06 ARM_A07 ARM_A08 ARM_A09 ARM_A10 ARM_A11 ARM_A12
ARM_D16 ARM_D17 ARM_D18 ARM_D19 ARM_D20 ARM_D21 ARM_D22 ARM_D23 ARM_D24 ARM_D25 ARM_D26 ARM_D27 ARM_D28 ARM_D29 ARM_D30 ARM_D31
MISO/RX1/GPIO0[16] MOSI/TX1/GPIO0[17]
SPI_CS/RX2/GPIO0[18]
SPI_CLK/TX2/GPIO0[19]
ARM_SDRAM_DQM2 ARM_SDRAM_DQM3
ARM_SDRAM_CLK
ARM_SDRAM_DQM1 ARM_SDRAM_DQM0
ARM_SDRAM_B1 ARM_SDRAM_B0 ARM_SDRAM_WE
ARM_SDRAM_RAS ARM_SDRAM_CAS ARM_SDRAM_CLK ARM_SDRAM_CKE
ARM_SDRAM_CS
+3.3VD
ARM_WR/GPIO3[16]/BOOT[0] ARM_RD/GPIO3[17]/BOOT[1]
ARM_CS/GPIO3[18]
ARM_WR/GPIO3[16]/BOOT[0]
ARM_RD/GPIO3[17]/BOOT[1]
+3.3VD
PCM_A[00:28]
PCM_D[00:15]
PCM_A00 PCM_A01 PCM_A02 PCM_A03 PCM_A04 PCM_A05 PCM_A06 PCM_A07 PCM_A08 PCM_A09 PCM_A10 PCM_A11 PCM_A12 PCM_A13 PCM_A14 PCM_A15 PCM_A16 PCM_A17 PCM_A18 PCM_A19 PCM_A20 PCM_A21 PCM_A22 PCM_A23 PCM_A24 PCM_A25
PCM_D00 PCM_D01 PCM_D02 PCM_D03 PCM_D04 PCM_D05 PCM_D06 PCM_D07 PCM_D08 PCM_D09 PCM_D10 PCM_D11 PCM_D12 PCM_D13 PCM_D14 PCM_D15
/RESET PCM_CS PCM_WR PCM_RD
+3.3VD
PCM_D00 PCM_D01 PCM_D02 PCM_D03 PCM_D04 PCM_D05 PCM_D06 PCM_D07 PCM_D08 PCM_D09 PCM_D10 PCM_D11 PCM_D12 PCM_D13 PCM_D14 PCM_D15
PCM_A00 PCM_A01 PCM_A02 PCM_A03 PCM_A04 PCM_A05 PCM_A06 PCM_A07 PCM_A08 PCM_A09 PCM_A10 PCM_A11 PCM_A12 PCM_A13 PCM_A14 PCM_A15 PCM_A16 PCM_A17 PCM_A18 PCM_A19 PCM_A20 PCM_A21 PCM_A22 PCM_A23 PCM_A24 PCM_A25
PCM_SDRAM_CLK PCM_SDRAM_CLK
PCM_CS PCM_WR PCM_RD
+3.3VD
+3.3VD
FLASF_RY/BY
+3.3VD
ARM_D15 ARM_D14 ARM_D13 ARM_D12 ARM_D11 ARM_D10 ARM_D09 ARM_D08 ARM_D07 ARM_D06 ARM_D05 ARM_D04 ARM_D03 ARM_D02 ARM_D01 ARM_D00
ARM_D15 ARM_D14 ARM_D13 ARM_D12 ARM_D11 ARM_D10 ARM_D09 ARM_D08 ARM_D07 ARM_D06 ARM_D05 ARM_D04 ARM_D03 ARM_D02 ARM_D01 ARM_D00
ARM_A10 ARM_A12 ARM_A11 ARM_A09 ARM_A08 ARM_A07 ARM_A06 ARM_A05 ARM_A04 ARM_A03 ARM_A02 ARM_A01 ARM_A00
SDRAM (U21, U22) data/address/control line to the A5 chip Try to get the line of isometric, are not more than 3 cm
A5 G3, J5 two feet, can not be connected to the nearest
To ensure both into two pieces of SDRAM 38 feet line of equal length
FLASH (U20) to the A5 attachment length difference can be relaxed
But the difference to control under 10 cm
12
I O Board Schematic