ASAHI KASEI
[AKD5394A]
<KM064804>
2005/05
-
5
-
(2) Setting of DIP switch : SW3(AK4103A)
CKS1
(SW3-6)
CKS0
(SW3-7)
MCLK
LRCK
OFF ON
128fs
28~216kHz
OFF OFF
256fs
28~108kHz (default)
Table5.Setting of system clock
DIF0
(SW3-8)
Audio Format
BICK
OFF
24bit, Left Justified
48~128fs
(default)
ON 24bit,
I2S
50~128fs
Table6. Audio format of AK4103A
[SW3-2,3,4,5] : Set sampling frequency of channel status. (default is all “OFF”.)
[SW3-1] : Set validity of channel status. (default is “OFF”.)
3. Setting of clock
Setting of clock of AK5394A and AK4103A
LRCK(fs) MCLK BICK
JP9
JP11
JP12
JP13
48kHz 256fs
128fs
64fs
12.288M
6.144M
3.072M
48k
HC74
(default)
96kHz 128fs 64fs
12.288M
6.144M
96k
HC74
192kHz 64fs 64fs
12.288M
12.288M
192k
HC74
Table7. System clock example
Содержание AK5394A
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