Model no.: .CT-21CBP5CP.doc
version 1.0
23
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Internal base-band delay line
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RGB control circuit with ‘Continuous Cathode Calibration’, white point and black level offset
adjustment so that the colour temperature of the dark and the light parts of the screen can
be chosen independently.
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Linear RGB or YUV input with fast blanking for external RGB/YUV sources. The Text/OSD
signals are internally supplied from the controller/Teletext decoder
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Contrast reduction possibility during mixed-mode of OSD and Text signals
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Horizontal synchronization with two control loops and alignment-free horizontal oscillator
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Vertical count-down circuit
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Vertical driver optimized for DC-coupled vertical output stages
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Horizontal and vertical geometry processing
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Horizontal and vertical zoom function for 16 : 9 applications
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Horizontal parallelogram and bow correction for large screen picture tubes
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Low-power start-up of the horizontal drive circuit
TV signal processor-Teletext decoder with embedded
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Controller TDA935X/6X/8X PS/N2 series
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-Controller
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80C51 ¡¡ontroller core standard instruction set and timing
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1 s machine cycle
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16 - 128Kx8-bit late programmed ROM
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3 - 12Kx8-bit DATA RAM (shared between Display, Acquisition and Auxiliary Ram)
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Interrupt controller for individual enable/disable with two level priority
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Two 16-bit Timer/Counter registers
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One 16 bit Timer with 8-bit Pre-scale
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WatchDog timer
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Auxiliary RAM page pointer
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16-bit Data pointer
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Stand-by, Idle and Power Down (PD) mode ¡ñ4 bits PWM for Voltage Synthesis Tuning
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8-bit A/D converter
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4 pins which can be programmed as general I/O pin, ADC input or PWM (6-bit) output Data
Capture
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Text memory for 0, 1 or 10 pages
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In the 10 page versions inventory of transmitted Teletext pages stored in the Transmitted Page
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Table (TPT) and Subtitle Page Table (SPT)
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Data Capture for US Closed Caption
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Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling (WSS) bit
decoding
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Automatic selection between 525 WST/625 WST ¡ñutomatic selection between 625
WST/VPS on line 16 of VBI
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Real-time capture and decoding for WST Teletext in Hardware, to enable optimized
processor throughput
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Automatic detection of FASTEXT transmission
Содержание CT-21CBP5CP
Страница 7: ...Model no CT 21CBP5CP doc version 1 0 7 SAFETY SYMBOL DESCRIPTION...
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Страница 17: ...Model no CT 21CBP5CP doc version 1 0 17 Note Do not change the data marked with _ in Data column...
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Страница 19: ...Model no CT 21CBP5CP doc version 1 0 19 STRUCTURE and CHASSIS FUNCTION DESCRIPTION 1 STRUCTURE BLOCK DIAGRAM...
Страница 20: ...Model no CT 21CBP5CP doc version 1 0 20 2 BLOCK DIAGRAM FOR SUPPLY VOLT AGE SYSTEM...
Страница 25: ...Model no CT 21CBP5CP doc version 1 0 25 3 Block Diagram...
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Страница 29: ...Model no CT 21CBP5CP doc version 1 0 29 Fig 8 Pin Configuration SDIP 64...
Страница 35: ...Model no CT 21CBP5CP doc version 1 0 35 4 Pin Connection Fig 16 5 Electrical Characteristics...
Страница 40: ...Model no CT 21CBP5CP doc version 1 0 40 WAVEFORMS OF KEY POINTS...
Страница 46: ...Model no CT 21CBP5CP doc version 1 0 46 APPENDIX...
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