Aiwa XR-MK25, Руководство по обслуживанию

Страница: 32 / 50

46
Pin No. Pin Name I/O Description
74 ~ 76 VD7 ~ VD9 O Pixel data bus. RGB or YCbCr format.
77 VDD3 – Power supply pin. Used in 3.3V.
78 ~ 80 VD10 ~ VD12 O Pixel data bus. RGB or YCbCr format.
81 VDD3 – Power supply pin. Used in 3.3V.
82 ~ 84 VD13 ~ VD15 O Pixel data bus. RGB or YCbCr format.
85 VSS – GND.
86 ~ 89 VD16 ~VD19 O Pixel data bus. RGB or YCbCr format.
90 VSS – GND.
91 ~ 94 VD20 ~ VD23 O Pixel data bus. RGB or YCbCr format.
95 VSYNC I/O Vertical sync signal.
96 HSYNC I/O Horizontal sync signal.
97 XVOE I Video output enable. (Connected to GND)
98 VDD3 – Power supply pin. Used in 3.3V.
99 VCLK I/O Video clock.
100 VSS – GND.
101 XAVRST I Hardware reset.
102 VSS – GND.
103 CD C2PO I Data error. Used during CD-ROM data input.
104 CD LRCK I LR clock.
105 CD DATA I Serial data input from CD-DSP.
106 CD BCK I Bit clock from CD decoder.
107 DA LRCK O LR clock.
108 DA DATA O Bit serial audio sample signal.
109 DA BCK O Audio bit clock.
110 VDD3 – Power supply pin. Used in 3.3V.
111 DA XCLK I External audio frequency clock.
112 VDD3 – Power supply pin. Used in 3.3V.
113 XINT O Interrupt request.
114 S0S1 I Block start sync. (Connected to GND)
115 HOSTEN I Host enable.
116 ROMEM I Boot ROM enable.
117 VFSY I Frame start or composite sync. (Connected to GND)
118 DAC EMP O Output emphasis flag.
119 CDDA EMP I Input emphasis flag.
120 GDATA I Subcode data. (Connected to GND)
121 GSCLK I/O Subcode data clock. (Not used)
122 CDDA/VCD O Input data identification. H: CDDA. L: video CD. (Not used)
123 VDDMAX I Power supply pin. Used in 5.0V.
124 FSC1 O Output generated by dividing-by-4 the pin-126 input CLK. (Not used)
125 VSS – GND.
All manuals and user guides at all-guides.com