– 22 –
Pin No.
Pin Name
I/O
Description
42
DSLF
O
DSL loop filter terminal.
43
DRF
O
Bias terminal for DSL.
44
PLLF
O
PLL loop filter terminal.
45
VCOF
O
Jitter free VCO loop filter terminal.
46
AVDD2
I
Analogue circuit power (for DSL, PLL, VCOF, AD, DA).
47
AVSS2
I
Analogue circuit GND (for DSL, PLL, VCOF, AD, DA).
48
OUTL
O
Lch audio output.
49
AVSS1
I
Analogue circuit GND.
50
OUTR
O
Rch audio output.
51
AVDD1
I
Analogue circuit power.
52
FSEL
I
Noise filter on/off switch input. "L": On, "H": Off. (Connected to VDD)
53
TMOD1
I
Terminal mode switch input terminal 1. Normally set to "L". (Connected to GND)
54
TMOD2
I
Terminal mode switch input terminal 2. Normally set to "L". (Connected to GND)
55
FLAG
O
Flag signal output. (Not used)
56
IPFLAG
O
Interpolation flag signal output. "H": Interpolation. (Not used)
57
EXT0
I/O
Extension input/output port 0. (Not used)
58
EXT1
I/O
Extension input/output port 1. (Not used)
59
IOVDD2
I
I/O power supply.
60
TX
O
Digital audio interface output signal. (Not used)
61
MCLK
I
Microcomputer command clock signal input. (Data is latched at loading edge)
62
MDATA
I
Microcomputer command data signal input.
63
MLD
I
Microcomputer command load signal input. "L": Load.
64
BLKCK
O
Sub-code block clock signal fBLKCK = 75Hz. (In normal PLAY mode)
65
PWMSEL
I/O
PWM output mode select input. (Connected to GND)
66
SMCK
O
4.236MHz/8.4672MHz clock signal output. (Not used)
67
DMUTE
I
Muting input. "H": Mute. (Connected to GND)
68
STAT
O
Status signal output.
69
NRST
I
Reset input. "L": Reset.
70
SPPOL
O
Spindle motor drive signal output. (Polar output)
71
PMCK
O
88.2kHz clock signal output. (Not used)
72
NCLDCK
O
Sub-code frame clock signal output = 7.35kHz ( In normal PLAY mode ) (Not used)
73
SUBC
O
Sub-code serial output. (Not used)
74
SBCK
O
Clock input for sub-code serial output. (Connected to GND)
75
NTEST
I
Test terminal, normally set to “H”. (Connected to VDD)
76
X2
O
Quartz oscillator circuit output terminal f = 16.93MHz.
77
X1
I
Quartz oscillator circuit input terminal f = 16.93MHz.
78
VDSS1
I
Digital circuit GND.
79
DVDD1
I
Digital circuit power.
80
EXT2
I/O
Extension input/output port 2. (Not Used)
d u p a
t o r
Содержание XP-R231
Страница 12: ...12 SCHEMATIC DIAGRAM 1 MAIN 1 2 d u p a t o r...
Страница 13: ...13 SCHEMATIC DIAGRAM 2 MAIN 2 2 TUNER SECTION d u p a t o r...
Страница 15: ...15 SCHEMATIC DIAGRAM 3 FLEX d u p a t o r...
Страница 17: ...17 IC BLOCK DIAGRAM d u p a t o r...
Страница 18: ...18 d u p a t o r...
Страница 28: ...2 11 IKENOHATA 1 CHOME TAITO KU TOKYO 110 8710 JAPAN TEL 03 3827 3111 9420025 921338...
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