Aiwa IC-DP200, Руководство по обслуживанию

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Pin No. Pin Name I/O Description
44 XIN I 13.5MHz crystal clock input.
45 XOUT O 13.5MHz crystal clock output.
46 VSSI – Ground.
47 APWUP I ASIC power up.
48 SECTEST I SEC test pin. (Connected to 3V power)
49 RSTB I ASIC reset.
50 VSSOP – Ground.
51 SDATA15 I/O SDRAM data 15.
52 VSSI – Ground.
53 ~ 55 SDATA14 ~ 12 I/O SDRAM data 14 ~ 12.
56 VDD3I – 3V power.
57 ~ 60 SDATA11 ~ 8 I/O SDRAM data 11 ~ 8.
61 CKE O SDRAM clock enable.
62 VSSI – Ground.
63SCLK O SDRAM clock.
64 VSSOP – Ground.
65 ~ 67 SADDR9 ~ 7 O SDRAM address 9 ~ 7.
68 VDD3OP – 3V power.
69 ~ 72 SADDR6 ~ 3O SDRAM address 6 ~ 3 .
73VSSI – Ground.
74 ~ 76 SADDR2 ~ 0 O SDRAM address 2 ~ 0.
77 SADDR10 O SDRAM address 10.
78 VSSI – Ground.
79 BA O SDRAM bank select address.
80 CS O SDRAM chip select.
81 RAS O SDRAM row address strobe.
82 CAS O SDRAM column address strobe.
83WE O SDRAM write enable.
84 VSSOP – Ground.
85 ~ 87 SDATA7 ~ 5 I/O SDRAM data 7 ~ 5.
88 VDD3OP – 3V power.
89 ~ 91 SDATA4 ~ 2 I/O SDRAM data 4 ~ 2.
92 VSSI – Ground.
93 ~ 94 SDATA1 ~ 0 I/O SDRAM data 1 ~0.
95 CPWDN O CIS power down.
96 VSYNC I CIS vertical sync.
97 HREF I CIS horizontal window reference.
98 VDATA15 I CIS video data 15 (UV7).
99 VDD3I – 3V power.
100 VDATA14 I CIS video data 14 (UV6).
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