108
CX-BK7
•
MB03 BOARD IC901 CXP973064-232R (MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
NO_USE
O
Not used
2
SDEN
O
Serial data enable signal output to the CD/DVD RF amplifier
3
DOCTRL/
ISBTEST
O
Digital out on/off control signal input from the digital signal processor
“L”: digital out off, “H”: digital out on
4
XRST_2753
O
Not used
5
SDA_EEP
I/O
Two-way data bus with the EEPROM
6
MNT1
I
EEPROM ready signal input from DVD decoder
7
FCS_JMP_1
O
Focus jump 1 signal output to the motor/coil driver
8
FCS_JMP_2
O
Focus jump 2 signal output to the motor/coil driver
9
SENS_CD
I
Internal status (SENSE) signal input from the digital signal processor
10
CDSP2
O
System clock frequency selection signal output to the digital signal processor
“L”: 16.9344 MHz, “H”: 33.8688MHz
11
CDSP4
O
Not used
12
XCS_DVD
O
Chip select signal output to the DVD decoder
13
VSS
—
Ground terminal
14 to 21
D0 to D7
I/O
Two-way data bus with the DVD decoder
22, 23
INIT0_DVD,
INIT1_DVD
I
Interrupt signal input from the DVD decoder
24
MSCK_SAMBA
O
Not used
25
XRST_1882
O
Reset signal output to the DVD decoder “L”: reset
26
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
27
LAT_CD
O
Serial data latch pulse signal output to the digital signal processor
28
LDON
O
Laser diode on/off control signal output to the CD/DVD RF amplifier
29
MIRR
I
Mirror signal input from the CD/DVD RF amplifier and digital signal processor
30
COUT_CD
I
Numbers of track counted signal input from the digital signal processor
31
INLIM
I
Detection signal input from limit in switch The optical pick-up is inner position when “H”
32
CS_ZIVA
O
Chip select signal output terminal
33
SI_ZIVA
I
Serial data input from the DVD system processor
34
SO_ZIVA
O
Serial data output to the DVD system processor
35
SCK_ZIVA
O
Serial data transfer clock signal output to the EEPROM and DVD system processor
36
DRVIRQ
O
Interrupt request signal output to the DVD system processor
37
DRVRDY
O
Ready signal output to the DVD system processor
38
RST
I
Reset signal input from the DVD system processor “L”: reset
39
VSS
—
Ground terminal
40
XTAL
I
System clock input terminal (20 MHz)
41
EXTAL
O
System clock output terminal (20 MHz)
42
VDD
—
Power supply (+3.3V)
43, 44
SLED_A, SLED_B
O
Sled motor drive signal output terminal
45
SCK_DSD
O
Output terminal for offset adjustment of APEO (
<z/.
pin of DVD decoder)
46
SDOUT_DSD
O
Serial data output terminal Not used
47
SDIN_DSD
I
Serial data input terminal Not used
48
READY_DSD
I
Ready signal input terminal Not used
49
DATA_CD
O
Serial data output to the digital signal processor
50
CLOK_CD
O
Serial data transfer clock signal output to the digital signal processor
51
XMSLAT
O
Serial data latch pulse signal output terminal Not used
