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1
DEFI
I
Defect detection signal (DEF) input. ("L" is applied when not used.)
2
TAI
I
For PLL/Test input. A pull-down resistor is incorporated.
3
PDO
O
Phase comparison output to control the external VCO.
4
VVSS
–
Ground of the built-in VCO. Normally, 0V.
5
ISET
I
For the connection of a resistor which adjusts the PDO output current.
6
VVDD
–
Power supply of the built-in VCO.
7
FR
I
Adjusts the VCO frequency range.
8
VSS
–
Ground of digital circuits. Normally, 0V.
9
EFMO
O
For slice level control/EFM signal output.
10
EFMIN
I
EFM signal input.
11
T2
I
Test input. A pull-down resistor is incorporated. Be sure to connect this to 0V.
12
CLV+
O
Disc motor control tri-state outputs.
13
CLV-
14
V/P
O
Output to monitor the automatic switching between the rough servo control and phase servo
control. "H" :Rough servo, "L": Phase servo.
15
HFL
I
Track detection signal input. Schmitt trigger input.
16
TES
I
Track error signal input. Schmitt trigger input.
17
TOFF
O
Tracking off output.
18
TGL
O
Tracking gain switching output. "L" raises the gain.
19
JP+
O
Track jump control tri-state outputs.
20
JP-
21
PCK
O
Monitors the clock signal for EFM data playback.4.3218MHz when the phase is locked.
22
FSEQ
O
Sync signal detection output. Goes "H" when the sync signal detected from the EFM
signal matches the sync signal generated internally. (Not used)
23
VDD
–
Power supply of digital circuits.
24
SL+
I/O
General purpose input/output 1. Controlled by serial data command issued by the microprocessor.
25
SL–
I/O
General purpose input/output 2. Controlled by serial data command issued by the microprocessor.
26
NC
–
Not connected.
27
PUIN
I/O
CD pickup inside limit switch.
28
RW
I/O
Serial data command sled signal output terminal from microprocessor.
29
EMPH
O
Deemphasis monitor. "H": when playing a deemphasis disc. (Not used)
30
C2F
O
C2 flag output. (Not used)
31
DOUT
O
Outputs a digital OUT signal. (EIAJ format) (Not used)
32
T3
I
Test input. A pull-down resistor is incorporated. Be sure to connect this to 0V.
33
T4
34
N.C
–
Not connected.
35
MUTEL
O
Lch 1-bit DAC/Lch muting output. (Not used)
Description
Pin No.
Pin Name
I/O
IC DESCRIPTION
IC, LC78622ED
Содержание CSD-A310 EZ' CSD-A310 G
Страница 10: ...SCHEMATIC DIAGRAM 1 MAIN 1 2 BATT A BATT B PHONE 10...
Страница 11: ...SCHEMATIC DIAGRAM 2 MAIN 2 2 CD MOTOR 11...
Страница 13: ...SCHEMATIC DIAGRAM 3 TUNER 13...
Страница 15: ...SCHEMATIC DIAGRAM 4 FRONT KEY FUNCT VOL 15...
Страница 17: ...17 IC BLOCK DIAGRAM...
Страница 31: ...2 11 IKENOHATA 1 CHOME TAITO KU TOKYO 110 JAPAN TEL 03 3827 3111 Printed in Singapore 9420208 0251431...