Aiwa 6ZG-1S, Руководство пользователя, Страница: 16 / 40

19
GND.
Lch-“0” detect flag.
Rch-“0” detect flag.
Clock input for SQSO read out.
SubQ 80 bit serial output.
SENS signal output to CPU.
Serial data input from CPU.
Latch input from CPU, Latch serial data at fall down.
Clock input to serial data transfer from CPU.
SENS input from SSP.
Numbers of track jump are counted and input.
Serial data output to SSP.
Serial-data latch output to SSP. Latch at fall down.
Clock output for serial data transfer to SSP.
Microcomputer expansion interface. (Input A)
Microcomputer expansion interface. (Input B)
Microcomputer expansion interface. (Output)
Focus OK input terminal. Used for SENS output and servo-auto sequencer.
Power supply. (+5V)
Servo control for spindle motor.
External control input for spindle motor.
TEST terminal. (Connected to GND)
TEST terminal. (Connected to GND)
Charge pump output for extensive EFM PLL.
VCO2 oscillator input for extensive EFM PLL.
VCO2 oscillator output for extensive EFM PLL.
VCO2 control voltage input for extensive EFM PLL.
Charge pump output for master PLL.
Filter (slave = digital PLL) output for master PLL.
Filter input for master PLL.
Analog GND.
VCO control voltage input for master.
Analog power. (+5V)
EFM signal input.
Constant current input to asymmetry circuit.
Comparison voltage input to asymmetry circuit.
EFM full-swing output. (L=VSS, H=VDD)
D/A interface, LR clock output f=FS.
LR clock input.
D/A interface, serial data output. (2’s COMP, MSB first)
D/A interface, serial data input. (2’s COMP, MSB first)
VSS
LMUT
RMUT
SQCK
SQSO
SENS
DATA
XLAT
CLOK
SEIN
CNIN
DATO
XLTO
CLKO
SPOA
SPOB
XLON
FOK
VDD
MDP
PWMI
TEST
TESI
VPCO
VCKI
V16M
VCTL
PCO
FILO
FILI
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
LRCK
LRCKI
PCMD
PCMDI
IC, CXD2589Q
Pin No. Pin Name I/O Description
1, 20, 45, 60
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 46, 61, 80
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
—
O
O
I
O
O
I
I
I
I
I
O
O
O
I
I
O
I
—
O
I
I
I
O
I
O
I
O
O
I
—
I
—
I
I
I
O
O
I
O
I
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