Advantech UNO-4672, Руководство пользователя

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UNO-4672 User Manual viii
2.9 Battery Backup SRAM.................................................... 21
2.9.1 Lithium Battery Specifications .................................... 22
Figure 2.6:SRAM Lithium Battery Location................ 22
2.10 Onboard Isolated Digital Input........................................ 22
2.10.1 Pin Assignments .......................................................... 22
Figure 2.7:Digital Input Connector Pin Assignments .. 23
Table 2.12:Digital Input Connector Signal Description ..
23
2.10.2 Isolated Inputs .............................................................. 23
Figure 2.8:Isolated Digital Input Connection .............. 24
2.10.3 Interrupt Function of the DI Signals ............................ 24
2.10.4 IRQ Level .................................................................... 24
2.10.5 Interrupt Control Register ............................................ 25
Table 2.13:Interrupt Control Register Bit Map ........... 25
2.10.6 Interrupt Enable Control Function ............................... 25
Table 2.14:Interrupt Disable/Enable Control ............... 25
2.10.7 Interrupt Triggering Edge Control ............................... 26
Table 2.15:Interrupt Triggering Edge Control ............. 26
2.10.8 Interrupt Flag Bit ......................................................... 26
Table 2.16:Interrupt Flag Bit Values ........................... 26
2.11 Onboard Isolated Digital Output ..................................... 27
2.11.1 Pin Assignments .......................................................... 27
Figure 2.9:Digital Output Connector Pin Assignments 27
Table 2.17:Digital Output Connector Signals .............. 27
2.11.2 Power On Configuration .............................................. 28
Figure 2.10:Location of CN40 ..................................... 28
Table 2.18:Digital Output Power On Configuration ... 28
2.11.3 Isolated Outputs ........................................................... 29
2.12 Onboard Isolated Counter/Timer .................................... 30
2.12.1 Counter/Timer Control Register .................................. 30
Table 2.19:Counter/Timer Control Register Bit Map .. 31
2.12.2 Counter 0 Function Block ............................................ 32
Figure 2.11:Counter 0 Function Block ........................ 32
2.12.3 Counter 1 Function Block ............................................ 32
Figure 2.12:Counter 1 Function Block ........................ 32
2.12.4 32-bit Counter Function Block (CTR32Set=1) .......... 32
Figure 2.13:32-bit Counter Function Block ................. 32
2.12.5 Counter Clock Source .................................................. 33
Table 2.20:Counter Clock Source Control Bit ............. 33
2.12.6 Counter Internal Clock ................................................. 33
Table 2.21:Counter Internal Clock Control Bit ........... 33
2.12.7 Counter Gate Source .................................................... 33
Table 2.22:Counter Gate Source Control Bit ............... 33
2.12.8 Counter Output Destination ......................................... 34
Table 2.23:Counter Output Destination Control Bit .... 34
2.12.9 Counter Interrupt Flag ................................................. 34
Table 2.24:Counter Interrupt Flag Control Bit ............ 34
2.12.10 Cascaded 32-bit Counter .............................................. 35