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UNO-2050 User's Manual
IRQ Level
The IRQ level is set automatically by the system BIOS. There is no
need for users to set the IRQ level. Only one IRQ level is used al-
though it has several interrupt sources.
Interrupt Control Register
The Interrupt Control Register controls the function and status of each
interrupt signal source. Table 2-3 shows the bit map of the Interrupt
Control Register. The register is readable/writable register. While being
written, it is used as a control register; and while being read, it is used
as a status register.
Table 2-3: Interrupt control register bit map
DI0EN & DI1EN: DI0 & DI1 Interrupt disable/enable control bit
DI0TE & DI1TE: DI0 & DI1 Interrupt triggering edge control bit
DI0F & DO1F: DI0 & DI1 interrupt flag bit
Interrupt Enable Control Function
The user can choose to enable or disable the interrupt function by
writing its corresponding value to the interrupt disable/enable control
bit in the interrupt control register, as shown in Table 2-4
Base Address
7
6
5
4
3
2
1
0
Base+02H
R/W
Interrupt Enable Control/Status Register
DI1EN
DI0EN
Base+03H
R/W
Interrupt Triggering Edge Control/Status Register
DI1TE
DI0TE
Base+07H
R/W
Interrupt Flag/Clear Register
DI1F
DI0F