Advantech SOM-4466, Руководство пользователя

Страница: 8 / 70

SOM-4466 User Manual viii
3.2.3 Chipset........................................................................................ 37
Figure 3.22Chipset Setup........................................................... 37
Figure 3.23North Bridge Configuration....................................... 38
Figure 3.24Memory Configuration .............................................. 39
Figure 3.25Socket 0 Information ................................................ 40
Figure 3.26North Bridge LCD Config Select (LVDS SKU) ......... 41
Figure 3.27North Bridge LCD Config Select (TTL SKU) ............ 42
Figure 3.28South Bridge............................................................. 43
Figure 3.29SB SATA Configuration............................................ 44
Figure 3.30SB USB Configuration.............................................. 45
3.2.4 Boot Settings .............................................................................. 46
Figure 3.31Boot Setup Utility...................................................... 46
3.2.5 Security Setup ............................................................................ 47
Figure 3.32Password Configuration ........................................... 47
3.2.6 Save & Exit ................................................................................. 48
Figure 3.33Save & Exit............................................................... 48
Chapter 4 S/W Introduction & Installation ........ 51
4.1 S/W Introduction ..................................................................................... 52
4.2 Driver Installation .................................................................................... 52
4.2.1
Windows XP / Windows 7 / Windows 8 Driver Setup ................. 52
4.2.2 Other OS..................................................................................... 52
4.2.3 SUSI ........................................................................................... 52
Appendix A Watchdog Timer ................................ 53
A.1 Programming the Watchdog Timer ......................................................... 54
Appendix B System Assignments ........................ 57
B.1 System I/O Ports..................................................................................... 58
Table B.1: System I/O Ports ...................................................... 58
B.2 DMA Channel Assignments .................................................................... 59
Table B.2: DMA Channel Assignments ..................................... 59
B.3 Interrupt Assignments ............................................................................. 60
Table B.3: Interrupt Assignments .............................................. 60
B.4 1st MB Memory Map............................................................................... 61
Table B.4: 1st MB Memory Map ................................................ 61