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SOM 144 Design Specification Rev.1.0

PIDE_CS3#

Primary IDE Chip Select 3 for Channel 1. This com-
mand output pin enables the IDE device to watch
the Read/Write Command.

PIDE_DRQ

IDE DMA Request for IDE Master. This is the in-
put pin from the IDE DMA request to do the IDE
Master Transfer. It will active high in DMA or Ul-
tra-33 mode and always be inactive low in PIO mode.

PIDED_AK#

IDE DACK# for IDE Master. This is the output pin
to grant the IDE DMA request to begin the IDE
Master Transfer in DMA or Ultra-33 mode.

PIDE_RDY

IDE Ready. This is the input pin from the IDE Chan-
nel to indicate the IDE device is ready to terminate
the IDE command in PIO mode. The IDE device can
de-assert this input (logic 0) to expand the IDE com-
mand if the device is not ready. In Ultra-33 mode,
this pin has different functions. In read cycle, IDE
device will drive this signal as Data Strobe
(DSTROBE) to use by IDE Busmaster to strobe the
input data. In write cycles, this pin is used by IDE
device to notify IDE Busmaster as DMA Ready
(DDMARDY#).

PIDE_IOR#

IDE IOR# Command. This is the IOR# command
output pin to notify the IDE device to assert the
Read Data in PIO and DMA mode. In Ultra-33
mode, this pin has different function. In read
cycle, this pin is used by IDE Busmaster to notify
IDE device as DMA Ready (DDMARDY#). In
write cycle, IDE Busmaster will drive this signal
as Data Strobe (DSTROBE) to use by IDE device
to strobe the output data.

PIDE_IOW#

IDE IOW# Command. This is the IOW# command
output pin to notify the IDE device that the avail-
able Write Data is already asserted by IDE Bus-
master in PIO and DMA mode. In Ultra-33 mode,
this pin is driven by IDE Busmaster to force IDE

Содержание SOM 144

Страница 1: ...SOM 144 System on Module Design Specification Rev 1 0...

Страница 2: ...iable However Advantech assumes no responsibility for its use nor for any infringements upon the rights of third parties which may result from its use All brand and product names mentioned herein are...

Страница 3: ...esigns this page lists the most recently printed revision of the SOM 144 specifica tion and design guide This revision history corresponds with the revision on the SOM 144 specifications and designs T...

Страница 4: ...7 3 1 144 pin SODIMM PCI IDE Serial port USB AC97 KB Mouse 8 3 1 1 PCI 8 3 1 2 IDE 9 3 1 3 Serial Ports 11 3 1 4 USB 11 3 1 5 AC97 12 3 1 6 PS 2 Keyboard Mouse 12 3 1 7 Miscellaneous 13 3 2 Recommende...

Страница 5: ...1 PCI Bus 28 5 1 1 IDSEL mapping 28 5 1 2 Interrupt Routing 28 5 1 3 Onboard resources 28 5 2 Power supply definition 29 5 3 Electrical Specifications 29 5 4 Serial ports 29 5 5 IrDA 30 5 6 Parallel P...

Страница 6: ......

Страница 7: ...T E R 1 General Information This chapter explains the concept of the SOM 144 System on Module module It also gives the reasons why SOM 144 can give the most value and benefits to embedded system appli...

Страница 8: ...SOM 144 module Different SOM 144 module may provide a different set of fea tures Please refer the datasheet or manual of your SOM 144 module for details or consult your supplier for supported features...

Страница 9: ...SOM 144 PCI Interfaces 3 C H A P T E R 2 Connector Assignments and Descriptions This chapter provides the pinout tables for the SOM 144 PCI interface including the 144 pin SODIMM and recommended 80 pi...

Страница 10: ...GND 16 GND 17 REQ 0 18 GNT 0 19 REQ 1 20 GNT 1 21 REQ 2 22 GNT 2 23 AD31 24 AD30 25 AD29 26 AD28 27 AD27 28 AD26 29 AD25 30 AD24 31 CBE 3 32 AD22 33 AD23 34 AD20 35 AD21 36 AD18 37 AD19 38 AD16 39 AD...

Страница 11: ...95 PIDE_IOR 96 PIDE_A1 97 PIDE_AK 98 RESERVED 99 PIDE_IRQ 100 PIDE_A2 101 PIDE_A0 102 PIDE_CS3 103 PIDE_CS1 104 BUZZER 105 MSDAT 106 MSCLK 107 KBDAT 108 KBCLK 109 VCC 110 VCC 111 OVCR 112 USB_EN 113...

Страница 12: ...PD6 24 PD7 25 ACK 26 BUSY 27 P E 28 SLCT 29 GND 30 IRFRXH 31 IRCRX 32 IRRX 33 IRTX 34 GND 35 TXDN 36 TXDP 37 GND 38 RXDN 39 RXDP 40 GND 41 GND 42 5VSB 43 5VSB 44 5VSB 45 PME 46 PWBT 47 PS_ON 48 CKRUN...

Страница 13: ...Chapter 3 Signal Description 7 Signal Description This chapter details each signal defined in the SOM 144 Module C H A P T E R 3...

Страница 14: ...d shared PCI Masters with onboard devices GNT 0 2 Grant signals to PCI Masters When asserted by the arbiter it means the PCI master has been legally granted to own the PCI bus AD0 31 PCI Address and D...

Страница 15: ...f a PCI access It will be as an output driven by Northbridge on behalf of CPU or as an input during PCI master access PCIRST PCI Bus Reset This is an output signal to reset the entire PCI Bus This sig...

Страница 16: ...if the device is not ready In Ultra 33 mode this pin has different functions In read cycle IDE device will drive this signal as Data Strobe DSTROBE to use by IDE Busmaster to strobe the input data In...

Страница 17: ...ifies the UART that the modem is ready to establish the communication link RXD1 RXD2 Receiver serial data input RTS1 RTS2 This active low output for serial port Handshake signal notifies the modem tha...

Страница 18: ...s detected For further description of USB Bus please refer Chapter 7 3 1 5 AC97 Allsignalsareprovidedfordirectivelyconnectingto a AC97Codec oraAC97compliantaudiocomponentonthesolutionboardsforthe audi...

Страница 19: ...ernal transistor Max sink current of this signal is 5mA EXTRST External Reset 3 2 Recommended front end 80pin board to board connector VGA Ethernet IrDA Printer FDD ATX GND Ground 12V 12V 5 power supp...

Страница 20: ...t drivendifferentialdrivercanbetwo level 10BASE T or three level 100BASE TX signals depending on the mode of operation These signals interface directly with an isolation transformer RXDN RXDP Analog T...

Страница 21: ...If the parallel port is used in parallel port mode floppy disk support is not available via the parallel port In case flop py support is need an external controller may be incorporated onto the backp...

Страница 22: ...bi directional parallel data bus bit 2 is used to transfer information between the SOM 144 Module and peripherals FDD Mode WP Write Protected This active low input from the FDD indicated that the disk...

Страница 23: ...r B On When set to 0 this output enables FDD B PE LPT Mode This signal indicates that the printer is out of paper FDD Mode WD Write Data This active low open drain for the SOM 144 Module writes precom...

Страница 24: ...r button func tion PME Power management event It describes wake up function in PCI bus CKRUN It is used by the system to pause or slowdown the PCI Clock signal When the CKRUN signal is not used this p...

Страница 25: ...Chapter 4 Mechanical Characteristics 19 Mechanical Characteristics C H A P T E R 4...

Страница 26: ...20 SOM 144 Design Specification Rev 1 0 4 1 Mechanical Characteristics 4 1 1 Dimensions of SOM 144 Module Figure 4 1 Dimensions of SOM 144 Module...

Страница 27: ...Chapter 4 Mechanical Characteristics 21 4 1 2 SOM 144 Solution Board Layout Figure 4 2 SOM 144 Solution Board Layout...

Страница 28: ...of SOM 144 Modules Therefore SODIMM socket must meet this requirement and so as the recom mended board to board connector Some suggested suppliers are listedbelow 4 1 4 SODIMM Layout Figure 4 3 144 p...

Страница 29: ...SOM 144 Module Installation 1 Plug the SOM 144 module into the solution board s SODIMM socket 2 Connet the front end connector to the solution board 3 Screw the SOM 144 Module and the solution board t...

Страница 30: ...tion Rev 1 0 4 1 6 SOM 144 Module Removal 1 Unscrew two screws 2 Bend out the positioning holders of the SODIMM socket and release the SOM 144 Module 3 Unplug the SOM 144 Module from the socket Figure...

Страница 31: ...Chapter 4 Mechanical Characteristics 25...

Страница 32: ...Chapter 5 Electrical Characteristics 27 Electrical Characteristics C H A P T E R 5...

Страница 33: ...ices of your SOM 144 Module need IRQ and DMA resources AD line Description AD21 SOM144 Backplane device 1 AD22 SOM144 Backplane device 2 AD23 SOM144 Backplane device 3 Device Number on SOM 144 Solutio...

Страница 34: ...owersupplypins Current rating per pin 0 3A at SODIMM 0 4A at the recom mended front end connector The SOM 144 Module s power pins can not be used to supply power to I O Boards The I O slots power must...

Страница 35: ...nsion FDD port support on printer port signals contact your SOM 144 Module supplier 5 7 FDD SOM 144 Modules don t support a standard floppy interface It s recommended for the SOM 144 Module designer t...

Страница 36: ...02 or otherstakefollowingspecificationsofEthernettransformer Tx turns ratio 1 1 5 Rx turns ratio 1 1 5 Insertion Loss 100KHz to 100MHz 1 1 dB Max Return Loss 1 to 80 MHz 10 dB Max DifferentialtoCommon...

Страница 37: ...32 SOM 144 Design and Specification Rev 1 0...

Страница 38: ...3 LITERATURE STANDARDS LINKS This SOM 144 specification and de sign guide does not cover informa tion regarding standard PC technol ogy Please refer to this selection of different information sources...

Страница 39: ...employing serial binary data inter change ANSI IEA 232 D National Semiconductor s Interface Data Book includes any applica tions notes These notes are also available online at http www national com A...

Страница 40: ...obtained from the Intel website Please go to http developer intel com and make quick search for ATX specification Some other documents are available on http www teleport com ffsupprt A 7 AC LINK 97 AC...

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