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15
PCIE-1803 User Manual
Chapter 3
C
ard Settings
&
C
onnections
The configuration of the keep last status jumper is shown in Table 3.2.
3.3
Channel Settings
3.3.1
Analog Input Coupling
Each analog input channel can be individually configured as either AC or DC cou-
pling. For DC coupling, any DC offset presented in the source signal is directly
passed to the ADC. The DC coupling configuration can be used if the source signal
has only small amounts of offset voltage or if the DC content of the signal is impor-
tant. However, if the source has significant amounts of unwanted offset voltage, AC
coupling should be used to take full advantage of the input dynamic range.
For AC coupling, a high-pass resistor-capacitor (RC) filter in the signal path is
enabled. The filter time constant is 0.2 seconds. For a step input signal, it takes 1.06
seconds to settle to 0.5% accuracy, and 3.33 seconds to settle to 24-bit accuracy.
The settling time also dependents on the signal source impedance.
Due to the settling time described above, users should take care when switching the
analog input channels from DC coupling to AC coupling. Users can either discard
samples taken during the settling time, or force a delay before starting the measure-
ment. There is no settling time issue when switching the analog input channels from
AC coupling to DC coupling.
The high-pass RC filter for AC coupling will attenuate the low-frequency component
of the input signal. The -3 dB cut-off frequency is 0.796 Hz.
3.3.2
IEPE Excitation
The PCIE-1803 is equipped with a 2 mA constant current source of IEPE excitation
for each analog input channel. When an IEPE sensor such as accelerometer or
microphone is connected to the analog input terminals, the IEPE excitation for that
channel must be enabled.
For those channels with IEPE excitation enabled, both pseudo-differential configura-
tion and AC coupling must be selected. The pseudo-differential resistor provides a
path for the IEPE excitation current to ground. The AC coupling removes the DC volt-
age offset generated by the IEPE excitation current through the sensor impedance. It
also prevents overvoltage conditions. This is shown in Figure 3-3.
Table 3.2: Keep last status jumper configuration.
CN1
Description
Keep last status after hot reset
Not keep last status after hot reset
Содержание PCIE-1803
Страница 1: ...User Manual PCIE 1803 8 ch 24 Bit 128 kS s Dynamic Signal Acquisition PCI Express Card ...
Страница 4: ...PCIE 1803 User Manual iv ...
Страница 12: ...PCIE 1803 User Manual 6 ...
Страница 13: ...Chapter 2 2 Installation ...
Страница 18: ...PCIE 1803 User Manual 12 ...
Страница 31: ...Appendix A A Specifications ...
Страница 39: ...Appendix B B Block Diagram ...
Страница 40: ...PCIE 1803 User Manual 34 B 1 Function Block Diagrams Figure B 1 Function block diagram overview ...
Страница 41: ...35 PCIE 1803 User Manual Appendix B Block Diagram ...