Advantech PCI-1753, Руководство пользователя

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Chapter 3 Function Description 25
3.3.5 Interrupt Triggering Edge Control
The interrupt can be triggered by a rising edge or a falling edge of the
interrupt signal, selectable by the value written in the “triggering
edge control” bit in the interrupt control register, as shown in follow-
ing table.
Table 3-4: Triggering edge control bit values
3.3.6 Interrupt Flag Bit
The “interrupt flag” bit is a flag indicating the status of an interrupt.
It is a readable and writable bit. Read the bit’s value to find the status
of the interrupt; write “1” to this bit to clear the interrupt. This bit
must be cleared in the ISR to service the next incoming interrupt.
Table 3-5: Interrupt flag bit values
F01: pattern patch interrupt flag bit of port A0
F02: change of state interrupt flag bit of port B0
Fn: interrupt flag bit of port Cn (n = 0 ~ 3)
En (n = 0 ~ 3) Triggering edge of interrupt signal
1 Rising edge trigger
0 Falling edge trigger
F01, F02 and Fn (n = 0 ~ 3) Interrupt Status
Read 1 Interrupt exists
0 No interrupt
Write 1 Clear interrupt
0 Don’t care