Advantech PCI-1751, Руководство пользователя

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11 PCI-1751 User Manual
Chapter 3
S
ignal Connections
reset will be logic 0 (voltage low), unless jumper JP4 determines otherwise. (See
Jumper JP4 below.)
Jumper JP4 Restores Ports to Their Condition Prior to Reset
Jumper JP4 gives the PCI-1751 a new and valuable capability. With JP4 enabled, the
PCI-1751 "memorizes" all port I/O settings and output values, and, in the event of a
"hot" reset, the settings and output values present at the port just prior to reset are
restored to each port following reset. This feature applies to both ports set by soft-
ware, and to ports configured as output ports via jumper. Depending on the applica-
tion, this capability may allow a card to be reset without requiring a complete
shutdown of processes controlled by the card (since port values are left unchanged
and are interrupted only momentarily).
Complete loss of power to the chip clears chip memory. Thus, even if JP4 is enabled,
if the power to the card is disconnected, the card's initial power-on state will be the
default state (for software-set ports) or the state of an output port with voltage low
output (for jumper-set ports).
When jumper JP4 is not enabled, power-off or reset results in ports returning to their
default state (for software-set ports) or returning to the state of output port with volt-
age low output (for jumper-set ports).
Select Clock Source of Timers and Counter
Jumpers JP1, JP2 and JP3 are used to select the clock source of Timer 0, Timer 1
and Counter 2, respectively. Short the upper two pins of the jumpers to select an
external clock source, or short the lower two pins to select an internal clock source.
However, the internal clock source of Timer 1 is connected to the output of Timer 0,
so shorting the upper two pins of JP2 results in the cascading of Timer 0 and Timer 1
as a 32-bit timer.
Table 3.1: Summary of Jumper Settings
Names of Jumpers Function description
JPA0, JPA1: Jumpers for ports A0, A1
JPB0, JPB1: Jumpers for ports B0, B1
JPC0L, JPC1L: Jumpers for low nibble of
ports C0, C1
JPC0H, JPC1H: Jumpers for high nibble of
ports C0, C1 (2-3)
short
Sets port as an output port
(1-2)
short Sets port to be software configu-
rable as input or output (default)
JP1: Timer 0
JP2: Timer 1
JP3: Counter 2
(2-3)
short
Internal counter clock source
(1-2)
short External counter clock source
(default)
JP4
(2-3)
short All ports return to state held just
prior to reset
(1-2)
short
All ports return to default states (for
software-set ports) or to output
ports output low (for jumper-set
ports)