Advantech IDK-1112P-50XGA1, Руководство пользователя

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IDK-1112P User Manual 16
2.8 Power On/Off Sequence
The power sequence specifications are shown as the following table and diagram.
Note (1) Please avoid floating state of interface signal at invalid periods.
Note (2) When the interface signal is invalid, be sure to pull down the power sup-
ply of LCD VCC to 0 V.
Note (3) The backlight converter power must be turned on after the power supply
for the logic and the interface signal to be valid. The backlight converter
power must be turned off before the power supply for the logic and the
interface signal is invalid.
Table 2.8: Timing Specifications:
Parameter
Value
Units
Min Typ Max
T1 0.5 - 10 ms
T2 0 - 50 ms
T3 0 - 50 ms
T4 500 - - ms
T5 450 - - ms
T6 200 - - ms
T7 10 - 100 ms
T8 10 - - ms
T9 10 - - ms
T10 20 - 50 ms