Advantech HPC-2820-ISSE, Руководство пользователя, Страница: 105 / 178

HPC-2820-ISSE User Manual 5-19
5.4.2 Chipset Configuration
This menu shows the chipset configuration settings. Select an item then press
<Enter> to display a pop-up menu with the configuration options.
Chipset Configuration
Crystal Beach Configure Enable [Enabled]
SERR Signal Condition [Single Bit]
Demand Scrub Enable [Enabled]
Patrol Scrub Enable [Enabled]
4GB PCI Hole Granularity [256 MB]
Memory Branch Mode [Interleave]
Branch 0 Rank Interleave [4:1]
Branch 0 Rank Sparing [Disabled]
Branch 1 Rank Interleave [4:1]
Branch 1 Rank Sparing [Disabled]
Enhanced x8 Detection [Enabled]
Force ITK Config Clocking [Disabled]
PhoenixBIOS Setup Utility
Advanced
Crystal Beach Configure Enable [Enabled]
Allows you to enable or disable the Configuration/Memory mapped accesses
to the Crystal Beach Configuration space located in Device 8, Fn 0, and Fn 1.
Configuration options: [Disabled] [Enabled]
Scroll down to display the following items:
F1:Help
↑↓
: Select Item -/+: Change Value F5: Setup Defaults
ESC: Exit
→←
: Select Menu Enter: Select SubMenu F10: Save and Exit
Advanced Processor Options
FBDIMM(s) Thermal Throttling [Open Loop]
Open Loop Type [Best Performan]
Item Specific Help
F1:Help
↑↓
: Select Item -/+: Change Value F5: Setup Defaults
ESC: Exit
→←
: Select Menu Enter: Select SubMenu F10: Save and Exit