Advantech ARK-7480, Руководство пользователя

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MIC-3780 User Manual xiv
Figure 3.25:Connect the USB cable to the Card Reader .
40
Figure 3.26:Fix the Card reader with the Card reader
bracket 40
Figure 3.27:Fix the Card Reader module into the drive
bay 41
Figure 3.28:Stacking back the drive bay and connect the
USB interface 41
3.16 Connecting Power ........................................................... 42
Chapter 4 Award BIOS Setup........................................ 44
4.1 Introduction ..................................................................... 44
4.1.1 CMOS RAM Auto-backup and Restore ...................... 44
4.2 Entering Setup ................................................................. 44
Figure 4.1:Award BIOS Setup initial screen ............... 45
4.3 Standard CMOS Setup .................................................... 45
Figure 4.2:Standard CMOS features screen ................ 46
4.4 Advanced BIOS Features ................................................ 46
Figure 4.3:Advanced BIOS features screen ................. 47
4.4.1 Virus Warning .............................................................. 47
4.4.2 L1 & L2 Cache ............................................................ 47
4.4.3 Quick Power On Self Test ........................................... 47
4.4.4 First/Second/Third/Other Boot Device ........................ 47
4.4.5 Swap Floppy Drive ...................................................... 47
4.4.6 Boot UP Floppy Seek .................................................. 47
4.4.7 Boot Up NumLock Status ............................................ 48
4.4.8 Gate A20 Option .......................................................... 48
4.4.9 Typematic Rate Setting ................................................ 48
4.4.10 Typematic Rate (Chars/Sec) ........................................ 48
4.4.11 Typematic Delay (msec) .............................................. 48
4.4.12 Security Option ............................................................ 48
4.4.13 APIC Mode .................................................................. 48
4.4.14 MPS Version Control For OS ...................................... 49
4.5 Advanced Chipset Features............................................. 49
Figure 4.4:Advanced Chipset Features setup .............. 49
4.5.1 DRAM Timing Selectable ........................................... 49
4.5.2 CAS Latency Time ...................................................... 49
4.5.3 Active to Precharge Delay ........................................... 50
4.5.4 DRAM RAS# to CAS# Delay ..................................... 50
4.5.5 DRAM RAS# Precharge .............................................. 50
4.5.6 DRAM Data Integrity Mode ........................................ 50
4.5.7 MGM Core Frequency ................................................. 50
4.5.8 System BIOS Cacheable .............................................. 50
4.5.9 Video BIOS Cacheable ................................................ 50
4.5.10 Memory Hole At 15M-16M ........................................ 50
4.5.11 Delayed Transaction .................................................... 50
4.5.12 Delay Prior to Thermal ................................................ 50