12
SPECIFICATIONS & BLOCK DIAGRAM
Frequency Response (20Hz~20kHz @ +4dBu):
+0/-0.5dB
Analog-to-Digital Converter:
64x oversampled 16-bit sigma-delta
THD + Noise (20Hz~20kHz @ +4dBu):
< 0.01%
Digital-to-Analog Converter:
128x oversampled 16-bit sigma-delta
Dynamic Range (20Hz~20kHz):
88dB
Propagation Delay:
1.25mSec
Input Impedance (balanced):
20k ohms
Power Requirements:
115/230VAC 50/60Hz
Maximum Input (unity gain):
+24dBu
Power Consumption:
< 10 watts
Output Impedance:
200 ohms
Dimensions:
Maximum Output (2k ohm load):
+24dBu
height (1 rack-space)
1.75 inches (44mm)
Delay Range:
1.25 mSec to 1.35 Sec
width
19 inches (483mm)
Delay Resolution (minimum increments):
20.8 uS
depth
7 inches (178mm)
Sampling Rate:
48kHz
Weight:
5.8 lbs (2.63kg)
DDL12 Block Diagram
non-volatile
memory
receive
send
link port
logic inputs
RS-232
serial
port
baud rate DIP switch
device # DIP switch
Input
gain
Output 1
gain
gain
Output 2
D/A
A/D
microprocessor
Digital Signal
Processor
&
DRAM