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80 Resource Mapping
Leading
EDGE COMPUTING
B.4 IRQ Lines (PIC Mode)
The following table lists the IRQ line mapping when APIC mode is
disabled.
IRQ #
Typical Interrupt
Resource
Connected to Pin Available
0 Counter 0 N/A No
1 Keyboard Controller N/A No
2
Cascade Interrupt
from slave PIC
N/A No
3 Serial Port 2 (COM2) IRQ3 via SERIRQ/PIRQ See note.
4 Serial Port 1 (COM1) IRQ4 via SERIRQ/PIRQ See note.
5 N/A IRQ5 via SERIRQ/PIRQ See note.
6 N/A IRQ6 via SERIRQ/PIRQ See note.
7 N/A IRQ7 via SERIRQ/PIRQ See note.
8 Real-Time clock N/A No
9 Generic N/A No
10 N/A IRQ10 via SERIRQ/PIRQ See note.
11 N/A IRQ11 via SERIRQ/PIRQ See note.
12 N/A IRQ12 via SERIRQ/PIRQ No
13 Math Processor N/A No
14 Generic N/A No
15 N/A N/A See note.
NOTE: NOTE:
The IRQs can be used for PCI devices when the onboard
device is disabled.