Actel Silicon Explorer II, Руководство пользователя, Страница: 23 / 42

17
A
Debugging SX/SX-A/eX Devices
Using Silicon Explorer II
SX, SX-A, and eX devices may require additional attention when
debugging. You must control probing on SX and SX-A devices through
the IEEE 1149.1 pins. You may configure the IEEE 1149.1 pins as
dedicated (JTAG only) or flexible (JTAG or I/O). This section assists
you with these and other considerations when debugging SX, SX-A, or
eX devices.
Probe Circuit Control Pins
The Silicon Explorer II tool uses the IEEE 1149.1 ports (TDI, TCK, TMS
and TDO) to select the desired nets for debugging. The user assigns
the selected internal nets to the PRA/PRB pins for observation.
Figure A-6 illustrates the connection between Silicon Explorer II and
the SX/SX-A/eX FPGA required to perform in-circuit debugging.
Figure A-6. Probe Setup
SX/SX-A/eX
Silicon Explorer Setup
Silicon
Explorer
TMS
TDI
TCK
TDO
PRA
PRB
Serial Connection
to Windows PC
16 Logic Analyzer Channels
SX/SX-A/eX