VPX4810 PCIe PMC/XMC 3U Carrier
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 6 -
http://www.acromag.com
- 6 -
www.acromag.com
Backplane
This board is design to work with a Backplane profile of BKP3-DIS06-15.2.7-n. Failure to use a
compatible backplane could result in damage to this product or others in the chassis. For more information on
backplane compatible please refer to the Acromag VPX4810 Compatibility Whitepaper.
WARNING: THE VPX4810 CAN ONLY BE USED ON A 3U BACKPLANE. PLUGGING THIS MODULE INTO
A 6U BACKPLANE MAY RESULT IN DAMAGE TO THIS BOARD DUE INCOMPATIBLE POWER SUPPLIES.
Non-Isolation Considerations
The board is non-isolated, since there is electrical continuity between the VPX bus and PMC module grounds.
As such, the field I/O connections are not isolated from the system. Care should be taken in designing
installations without isolation to avoid noise pickup and ground loops caused by multiple ground connections.
The model VPX4810 carrier field I/O connections are made
through the rear via J4 for a single PMC mezzanine
I/O module card.
Jumper Settings
The VPX4810 has two jumpers for selecting the number of PCIe lanes used from the backplane and another to
control how the chassis ground is connected. Note that the jumpers are in the same location on each model
regardless of metalwork.
Jumper Settings
The following section describes the VPX4810 jumpers with their default positions and functions.
SW-1, SW-2, SW3 and SW-4 are reserved.
SW1-5
VPX Uplink Port
Select
OPEN
Uplink is VPX Fat Pipe B
CLOSED(default)
Uplink is VPX Fat Pipe or Double Fat Pipe A
SW1-6
PCIe Link
Speed Select
OPEN (default)
GEN 1 & GEN 2 SUPPORTED
CLOSED
FORCE GEN 1 SPEED ON ALL CONNECTIONS
SW1-7
VPX PORT
Select
OPEN (default)
VPX PCIE connection is 1 x 8 Double Fat Pipe
CLOSED
VPX PCIE connection is 2 x 4 Fat Pipes
SW1-8
PCIe Clock
Select
OPEN (default)
NON-COMMON CLOCK
CLOSED
100MHz COMMON CLOCK FROM P0 REFCLK PINS
Best system stability may be achieved with the use of a 100MHz common clock connection from the SBC,
especially at Gen 2 link speeds. If the system does not provide a common clock then non-common clock mode
must be used.
