Achronix PCIe Accelerator-6D Card, Руководство пользователя

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PCIe Accelerator-6D Card User Guide (UG074)
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FTDI CLI
The PCIe Accelerator-6D's on-board FTDI solution allows for programming and debug of HD1000 FPGA using a
command-line interface via a micro-USB connector (J8). The FTDI FT2232H device's multi-protocol synchronous
serial engine (MPSEE) is configured for single-chip USB-to-JTAG communication, thus providing a direct
interface to the host PC via a USB 2.0 (compatible with USB1.0/USB3.0) interface. Execute
from a command-line interface (CLI) window on the development PC to download
acx_stapl_player.exe
and configure the HD1000 directly via USB. For more details on programming the HD1000 FPGA using the
Achronix STAPL Player, refer to the
(UG004) - Chapter Bitstream Programming and Debug Interface User Guide
4: Using the Achronix STAPL Player.
Bitporter CLI
As mentioned earlier, the HD1000 FPGA can be programmed via the JTAG interface using a Bitporter pod. If a
Bitporter pod is connected to the JTAG interface (J6) and the SW30000 switch is set to use the JTAG interface
as per the table,
, use the command line SW3000 Programming Interface Switch Connections (see page 17)
interface to configure, program and debug the HD1000. Execute from a command
acx_stapl_player.exe
line interface (CLI) window on the development PC to download and configure the HD1000. For more details on
programming the HD1000 FPGA using the Achronix STAPL Player, refer to the
Bitstream Programming and
- Chapter 4: Using the Achronix STAPL Player. Debug Interface User Guide
Note
Care must be taken when powering up the Bitporter pod and the development board. Refer to the
for more details. Bitstream Programming and Debug Interface User Guide
ACE GUI
Besides programming the HD1000 FPGA, the ACE GUI can also be used for communicating with the board. The
following figures show various ACE GUI perspectives for bitstream programming and communication with the
board.
Figure shows a screenshot of the ACE GUI for Bitstream Programming (see page 28)
file executed from the ACE “Download” View.
acx_stapl_player.exe
Figure shows a screenshot of the JTAG Browser ACE GUI for Register Access via JTAG (see page 28)
perspective using which the user can access all the hard-IP registers.
Figure shows a screenshot of the Snapshot ACE GUI for Real-time Design Debug (see page 29)
perspective through which one can evaluate the signals of a user's design in real-time. For more details
please refer to the
. Snapshot User Guide
Figure shows a screenshot for Hardware Demo perspective ACE GUI for Hardware Demo (see page 29)
which is TCL base UI for control and monitoring of hardware demo and reference designs.
For more details, please refer to the . ACE User Guide