PCIe Accelerator-6D Card User Guide (UG074)
16
Speedster FPGAs
Getting started
Power Sequencing
The power sequencing on the board is pre-configured and is controlled by Linear Technology's LTM2987 power
system manager. After connecting the power supply and the POWER GOOD LED (DS3000) is steady green, the
board is fully powered up and has initialized all the components in the right order.
Initialization
As mentioned above, the power to all devices on the board is controlled by the pre-configured LTM2987 power
system manager which acts as the I C master initially during power-up. This device then drives and manages the
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various other LTM switching regulators which provide power to the various power rails of the HD1000 FPGA.
Once the board is powered-up, a set of LEDs light. Refer to the
PCIe Accelerator-6D Card Quick Start User
for details on default power-up behavior.
Following power-up the various clock are then brought up. The clocks on the board come pre-configured and
generated by IDT clock device. The various devices on the board can be controlled via the I C bus by either the
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on board HD1000 FPGA or through an external device via the DC1613A I C programming connector, either of
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which can act as the I C bus master. After power-up and initialization, the HD1000 becomes the default I C bus
2
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master.
Downloading a Design
Typically, the following steps are needed to download a design to the board and start debugging an application.
Configuring the Board for the Appropriate Bitstream Source (see page 16)
Connecting the Host PC (see page 14)
and Running the application
The following sources are currently supported for the FPGA bitstream on this board:
Bitstream download via JTAG using the on-board FTDI device its corresponding micro-USB port using the
provided micro-USB cable which connect to the host PC.
Bitstream download via JTAG using a Bitporter pod which connects to the host PC.
Bitstream programming using the on-board flash SPI (×1, ×4) memory and CPU programming mode (may
be made available in future release).
Configuring the Board for the Appropriate Bitstream Source
The board is pre-configured with switch SW3000 set to "Disable SPI" to accept bitstreams from the JTAG
interface. The following is SW3000 switch configuration for the various programming interface modes:
