Acer Veriton 5800, Руководство пользователя

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39 Chapter 2
Advanced Chipset Features
Parameter Description Options
CAS Latency TIme When synchronous DRAM is installed, the number of clock
cycles of CAS latency depends on the DRAM timing. 5,4,3,6,Auto
DRAM RAS# to CAS# Delay This field lets you insert a timing delay between the CAS
and RAS strobe signals, used when DRAM is written to,
read from, or refreshed, Fast gives faster performance; and
Slow gives more stable performance. This field applies only
when synchronous DRAM is installed in the system.
2,3,4,5,6,Auto
DRAM RAS# Precharge
TIme If an insufficient number of cycles is allowed for the RAS to
accumulate its charge before DRAM refresh, the refresh
may be incomplete and the DRAM may fail to retain data.
Fast fives faster performance; and Slow gives more stable
performance.This field applies only when synchronous
DRAM is installed in the syste. 2,3,4,5,6,Auto
Active Precharge Delay This option is used to set up the timing delay between the
SDRAM active to precharge. 4,5,6,7,8,9,10,11,
12,Auto
Refresh Mode Select This option is used to set up e the Refresh Mode 7.8us
15.6us
Auto
DVMT Mode This option is used to select the video mode. Fixed,DVMT,Both
On Chip Memory Size Select the on chip memory size for VGA drive use.
CAS Latency Time [Auto]
Item Help
DRAM RAS# to CAS# Delay [Auto] Menu Level
X
DRAM RAS# Precharge [Auto]
Active to Precharge Delay [Auto]
Refresh Mode Select [Auto]
** On-Chip VGA Setting **
DVMT Mode [Both]
On-chip Video Memory Size [128MB]
CMOS Setup Utility-Copyright © 1984-2005 Award Software
Advanced Chipset Features
KLIJ
: Move Enter: Select +/-/PU/PD: Value F10:Save ESC: Exit F1: General Help
F5: Previous Values F7: Default Settings