Acer Aspire T600, Руководство по обслуживанию

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28 Chapter 2
Advanced Chipset Features
The advanced chipset features setup option is used to change the values of the chipset registers. These
registers control most of the system options in the computer.
Parameter Description
DRAM Frequency This item determines frequency of DRAM memory.
Configure DRAM Timing by
SPD Enables you to select the CAS latency time in HCLKs of 2, 2.5, or 3. The value
is set at the factory depending on the DRAM installed. Do not change the values
in this field unless you change specifications of the installed DRAM or the
installed CPU.
DRAM CAS# Latency This item determines the operation of DRAM memory CAS (column address
strobe). It is recommended that you leave this item at the default value. The 3T
setting requires faster memory that specifically supports this mode. Please be
noted that the item would be hidden when set Configure DRAM Timing by SPD
to Enabled.
DRAM RAS# to CAS# Delay This field lets you insert a timing delay between the CAS and RAS strobe
signals, used when DRAMis written to, read from, or refreshed. Disabled gives
faster performance; and Enabled gives more stable performance. Please be
noted that the item would be hidden when set Configure DRAM Timing by SPD
to Enabled.
DRAM RAS# Precharge Select the number of CPU clocks allocated for the Row Address Strobe (RAS#)
signal to accumulate its charge before the DRAM is refreshed. If insufficient
time isallowed, refresh may be incomplete and data lost. Please be noted that
the item would be hidden when set Configure DRAM Timing by SPD to Enabled.
DRAM RAS# Activate to
Precharge The precharge time is the number of cycles it takes for DRAM to accumulate its
charge before refresh. Please be noted that the item would be hidden when set
Configure DRAM Timing by SPD to Enabled.