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138
Chapter 4
0x1A
Initialize DMA command register with these settings:
1. Memory to memory disabled 2. Channel 0 hold
address disabled 3. Controller enabled 4. Normal
timing 5. Fixed priority 6. Late write selection 7.
DREQ sense active 8. DACK sense active low.
LBT
Core
0x22
Reset the keyboard.
LBT
Core
0x40
Test A20 line
LBT
Core
0x67
Quick initialization of all Application Processors in a
multi-processor system
LBT
Core
0x32
Compute CPU speed.
LBT
Core
0x69
Initialize the handler for SMM.
LBT
Core
0x6B
If CMOS is bad, load Custom Defaults from flash into
CMOS. If successful, reboot.
LBT
Core
0x3C
If CMOS is valid, load chipset registers with values
from CMOS, otherwise load defaults and display
Setup prompt. If Auto Configuration is enabled,
always load the chipset registers with the Setup
defaults (Rel 6.0).
LBT
Core
0x3D
Load alternate registers with CMOS values
LBT
Core
0x42
Initialize interrupt vectors 0 thru 77h
LBT
Core
0x46
Verify the ROM copyright notice
LBT
Core
0x45
Initialize all motherboard devices.
LBT
Core
0x49
1. Size the PCI bus topology and set bridge bus
numbers. 2. Set the system max bus number. 3.
Write a 0 to the command register of every PCI
device. 4. Write a 0 to all 6 base registers in every
PCI device. 5. Write a -1 to the status register of
every PC
LBT
Core
0xC6
Initialize note dock
LBT
Core
0xC5
PnPnd dual CMOS (optional)
LBT
Core
0x48
Verify that the equipment specified in the CMOS
matches the hardware currently installed. If the
monitor type is set to 00 then a video ROM must
exist. If the monitor type is 1 or 2 set the video switch
to CGA. If monitor type 3, set the video switch to m
LBT
Core
0xD1
Initialize BIOS stack
LBT
Core
0xD3
Setup E820h and WAD memory map
LBT
Core
0x24
Set segment-register addressability to 4 GB
LBT
Core
0xCC
Redirect Int 10h to enable target board to use a
remote serial video (PICO BIOS).
LBT
Core
0x8A
Initialize Extended BIOS Data Area and initialize the
mouse.
LBT
Core
0x9D
Initialize Security Engine.
LBT
Core
0x55
USB Initialization
LBT
Core
0x52
Verify keyboard reset.
LBT
Core
0x54
Initialize keystroke clicker if enabled in Setup.
LBT
Core
0x76
Check status bits for keyboard-related failures.
Display error messages on the screen.
LBT
Core
0x4A
Initialize all video adapters in system
LBT
Core
POST Code
Function
Phase
Component
Содержание ASPIRE 4230
Страница 6: ...VI ...
Страница 10: ...X Table of Contents ...
Страница 38: ...28 Chapter 1 ...
Страница 54: ...44 Chapter 2 ...
Страница 56: ...46 Chapter 2 ...
Страница 81: ...Chapter 3 71 6 Remove the upper cover by lifting upward from the chassis Disconnect E as shown ...
Страница 89: ...Chapter 3 79 5 Disconnect the cable from the bluetooth board ...
Страница 168: ...Appendix A 158 Model Definition and Configuration Appendix A ...
Страница 192: ...Appendix A 182 ...
Страница 198: ...188 Appendix C ...