Acces I/O products M.2-/mPCIe-AI12-16 Скачать руководство пользователя страница 1 | Manualshive

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ACCES I/O Products, Inc.

+1 858 550 9559

www.ACCESio.com

10623 Roselle Street

800 326 1649

http://accesio.com/mPCIe-AIO16-16F

http://accesio.com/M.2-AIO16-16F

San Diego CA 92121-1506 USA

[email protected]

MADE IN THE USA

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Содержание M.2-/mPCIe-AI12-16

Страница 1: ...t 800 326 1649 http accesio com mPCIe AIO16 16F http accesio com M 2 AIO16 16F San Diego CA 92121 1506 USA sales accesio com MADE IN THE USA 16 ANALOG INPUT 4 ANALOG OUTPUT 2 DIGITAL I O FOR M 2 AND PCI EXPRESS MINI CARD HARDWARE MANUAL MODELS M 2 AND MPCIE AIO16 16F FAMILY ...

Страница 2: ... 32k FIFO plus DMA for efficient robust data streaming 2 Digital I O pins with flexible secondary functions Four 16 bit analog outputs 5 per channel programmable ranges 0V to 5V 0V to 10V 2 5V 5V 10V Outputs Drive 10mA Guaranteed Onboard Watchdog with status output RoHS compliant standard CHAPTER 3 HARDWARE This manual applies to the following models VENDEV M 2 mPCIe AIO16 16F mPCIe A D 16 bit 2Ms...

Страница 3: ...rer if it requires a different size The mPCIe standard like its PCI Mini Card predecessor was designed assuming use primarily in Laptop or Notebook and similar devices where physical dimension is often the paramount design constraint In Data Acquisition and Control applications low weight and vibration tolerance tend to be of more concern CHAPTER 6 I O INTERFACE Most customers will use the optiona...

Страница 4: ...er at CH0 1 0 Advanced Sequence Acquires Channel 0 using the gain selected via 18 bits 2 0 Conversion starts will automatically cycle through the channels from CH0 through INx2 0 and each channel is acquired at the per channel gain set in 18 The sequence repeats starting at CH0 after INx2 0 is acquired 1 1 Basic Sequence Acquires channel 0 using the gain set in Gain2 0 Conversion starts will autom...

Страница 5: ...are 8 bits 0 RW Resets and Power Board and Feature Reset command bits and ADC Power Down control bit and status 4 W DAC Control DAC LTC2664 Command Register bits C R ADC Base Clock Frequency of the ADC Sequencer Base Clock Hz used to calculate the ADC Rate Divisor for desired conversion rates 10 W R ADC Rate Divisor ADC Start Rate ADC Base Clock ADC Rate Divisor this register 14 W R ADC Rate Divis...

Страница 6: ...A1 A0 16 bit DAC Counts 0 FFFF Please refer to the LTC2664 Data Sheet for details Consult the AIOAIO Software Reference or our sample programs source to avoid the hassle DAC_SetRange1 iBoard iChannel iRange DAC_OutputV iBoard iChannel double Voltage ADC Base Clock Offset C of 32 bit Memory BAR 1 Read Only 32 bits only ADC Base Clock Reading this 32 bit register returns the speed in Hertz of the cl...

Страница 7: ...ak measurement capability of 4 V p p ADC Advanced Sequencer Gain Control 2 Offset 1C of 32 bit Memory BAR 1 Read Write 32 bits only bit D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RSV AIN 15 GAIN2 0 RSV AIN 14 GAIN2 0 RSV AIN 13 GAIN2 0 RSV AIN 12 GAIN2 0 RSV AIN 11 GAIN2 0 RSV AIN 10 GAIN2 0 RSV AIN 9 GAIN2 0 RSV AIN 8...

Страница 8: ...6 16F does not have anything usefully connected to the Aux Mux inputs and you should not bother acquiring data from them SEQ The SEQ bit indicates which ADC the data is from and can be thought of as Channel 3 That is if SEQ is set add 8 to the channel reported by the Channel2 0 bits Channel2 0 The 3 Channel bits indicate from which Analog Input the paired ADC Counts were sampled Refer to ADC Contr...

Страница 9: ...t D31 through D19 D18 D17 D16 D15 D14 through D12 D11 D10 D9 through D7 D6 D5 D4 D3 D2 D1 D0 Name UNUSED RSV CONFIG RSV RSV INx2 0 COM RSV Gain2 0 MUX SEQ1 SEQ0 TEMP RSV CMS RSV Controls ADAS 1 channels 8 15 Refer to 38 ADC Control 1 for details IRQ Enable Clear and Status Offset 40 of 64 bit Memory BAR 2 3 Read Write 32 bits only bit D31 D30 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D9 D8 D7 D6...

Страница 10: ...an IRQ enSTART SET enSTART to enable the ADC Start Conversion Digital Input Secondary Function on DIO 0 so the selected edge will cause an ADC Start Event and optionally generate an IRQ enTRIG SET enTRIG to enable the ADC Trigger Digital Input Secondary Function on DIO 0 so the selected edge will trigger timed ADC conversions and optionally generate an IRQ Consult the Software Tips section for det...

Страница 11: ...dern Operating Systems have introduced a new source of latency the kernel userland division Application code runs in userland which must transition to the kernel in order to perform any hardware operation This transition adds quite a lot of latency which varies between different OSes motherboards and revisions thereof etcetera A Windows XP system can see an additional 7µs per transaction a modern ...

Страница 12: ...ting Female D Sub Miniature 37 pin Model Options T Extended Temperature Operation 40 to 85 C I ID 4 20mA inputs Singled ended Differential PD Pull downs on digital bits Sxx Special configurations 10 50mA inputs input voltage dividers conformal coating etc CHAPTER 9 CERTIFICATIONS CE FCC These devices are designed to meet all applicable EM interference and emission standards However as they are int...

Страница 13: ... package All units components should be properly packed for handling and returned with freight prepaid to the ACCES designated Service Center and will be returned to the customer s user s site freight prepaid and invoiced COVERAGE FIRST THREE YEARS Returned unit part will be repaired and or replaced at ACCES option with no charge for labor or parts not excluded by warranty Warranty commences with ...

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