16. USART2
A96G150 User's manual
230
Figure 101 describes sampling process of the start bit of an incoming frame. The sampling rate is 16
times the baud rate for normal mode, and 8 times the baud rate for Double Speed mode (U2X=1). The
horizontal arrows show the synchronization variation due to the asynchronous sampling process. Note
that larger time variation is shown when using the Double Speed mode.
Figure 101. Start Bit Sampling
When the Receiver is enabled (RXE=1), the clock recovery logic tries to find a high to low transition on
the RXD2 line, which is a start bit condition. After detecting the high to low transition on RXD2 line, the
clock recovery logic uses the samples 8, 9, and 10 for Normal mode, and the samples 4, 5, and 6 for
Double Speed mode to decide if a valid start bit is received. If more than 2 samples have logical low
level, it is considered that a valid start bit is detected and the internally generated clock is synchronized
to the incoming data frame. And the data recovery can begin. The synchronization process is repeated
for each start bit.
As described above, when the Receiver clock is synchronized to the start bit, the data recovery can
begin. Data recovery process is almost similar to the clock recovery process. The data recovery logic
samples 16 times for each incoming bits for Normal mode and 8 times for Double Speed mode. It uses
the samples 8, 9, and 10 to decide data value for Normal mode, and the samples 4, 5, and 6 for Double
Speed mode.
RxD2
0
0
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15
16
1
2
3
IDLE
BIT0
START
0
1
2
3
4
5
6
7
8
1
2
Sample
(U2X = 0)
Sample
(U2X = 1)
Содержание A96G150
Страница 126: ...12 Timer 0 1 2 3 4 5 A96G150 User s manual 126 Figure 43 16 bit Timer Counter Mode Operation Example...
Страница 136: ...12 Timer 0 1 2 3 4 5 A96G150 User s manual 136 Figure 51 16 bit Timer Counter Mode Operation Example...
Страница 147: ...A96G150 User s manual 12 Timer 0 1 2 3 4 5 147 Figure 59 16 bit Timer Counter Mode Operation Example...
Страница 157: ...A96G150 User s manual 12 Timer 0 1 2 3 4 5 157 Figure 67 16 bit Timer Counter Mode Operation Example...
Страница 171: ...A96G150 User s manual 14 12 bit ADC 171 Figure 79 ADC Operation Flow Sequence...
Страница 333: ...A96G150 User s manual Revision history 333 Revision history Revision Date Notes 1 00 2022 06 22 First creation...