ABB ReliaGear ASPMETER A 42, Инструкции по установке и вводу в эксплуатацию

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ASPMETER commissioning
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B R A NCH CI RCU IT MON ITOR I NG
I N S TA L L AT I O N A N D CO M M I SS I O N I N G I N S T R U C T I O N S
Line-to-line voltage alarms
Registers 241–243:
• Latching alarms are cleared by writing a 0 to its alarm bit.
• Bit 0: High latching alarm
• Bit 1: Low latching alarm
• Bit 2–7: Reserved for future use (reads 0)
• Bit 8: High non-latching alarm
• Bit 9: Low non-latching alarm
• Bit 10–15: Reserved for future use (reads 0)
Global alarm registers (per panel)
Registers 224–227:
These registers provide a means of identifying alarm
conditions without polling every alarm and inspecting all
the bits. A global alarm register bit is set when a branch or
auxiliary alarm channel activates. For example, if bit 2 in branch
alarm status 38 is set, then bit 2 in the global latching alarm
status will also be set. This allows the user to read the global
alarms only in the event of an alarm condition, minimizing
network traffic. Global most-recent latching alarm channel
tells the user the number of the channel that has had the most
recent alarm event. Note: Bits 0 to 4 in branch alarm status
correspond to bits 0 to 4 in global alarm status; higher bits
do not match directly. An excerpt from the Modbus point map
appears below; see the full point map for more information.
Alarm counters
The alarm counters measure the number of times an alarm has
been set. On a multi-master system, these counters indicate
whether an alarm went off and whether it was cleared
afterward. It also allows one master to retain these records
even if another master has cleared the alarm. When any of
the 46 corresponding counters increment, the global variants
of the latching alarm counters increment correspondingly.
Register Description
224
Global latching alarm status
Bit 0: High-high latching alarm
Bit 1: High latching alarm
Bit 2: Low latching alarm
Bit 3: Low-low latching alarm
Bit 4: Latching alarm OFF state declared
(1=OFF; ON state must have been achieved prior)
Bit 5–7: Reserved for future use (reads 0)
Bit 8: High voltage latching alarm
Bit 9: Low voltage latching alarm
Bit 10–15: Reserved for future use (reads 0)
225
Global non-latching alarm status
Bit 0: High non-latching alarm
Bit 1: Low non-latching alarm
Bit 2–7: Reserved for future use (reads 0)
Bit 8: High voltage non-latching alarm
Bit 9: Low voltage non-latching alarm
Bit 10–15: Reserved for future use (reads 0)