With secondary electronics analog and HART, it is to
be consider that different communication protocols exist for
configuration and maintenance operations. Here follows a
brief description on the matter; please refer to appropriate
technical specification for additional deeper explanations on
the communication aspects.
The HART protocol is based on the standard Bell 202 FSK
(Frequency Shift Keying ) with a
±
0.5 mA signal modulation
superimposed on the 4 to 20 mA analog signal. As the energy
balance added to the current loop is virtually zero and the
frequency is very high compared to that of the process dynamic,
the analog process signal remains undisturbed. Using a
configuration device it is then possible to remotely modify the
configuration of the transmitter, e.g. the measuring range.
. . . PRINCIPLE OF OPERATION
Internal Serial Bus
Parallel Bus
SENSOR
INTERFACE
DIGITAL
CONVERTER
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
MICRO
CONTROLLER
EXT. ADJ
INTERFACE
MEMORY
4 to 20 mA
CONVERSION
MEMORY
Primary electronics
(located in the
Primary Unit)
Sensors
Internal bus
Fig. 3 - Functional Block Diagram ( HART version)
MODEM FSK
COUPLER
Zero
Span
Secondary Electronics
(located in the
Secondary Unit)
4 to 20 mA
Output
For the ANALOG version the microprocessor computers the 4
to 20 mA output signal.
For the HART version, in addition to the 4 to 20 mA
output signal, the microprocessor also receives data from the
internal modem, in order to provide bidirectional digital
communication with the configuration device, i.e. the Hand
Held terminal "Communicator" or P.C. based "Configurator".
It is also possible to read other transmitter data and diagnostic
information. Limited rezeroing and respanning, comparable to
that conventional analog transmitters is possible using the
optional calibration device. Refer to Fig. 3 for a complete view
of the Functional Block Diagram.
The sensor and all electronic parts are galvanically isolated
from the transmitter body.
For the analog version the Function Block Diagram is the same
as the one represented in Fig. 3, but without the MODEM - FSK
COUPLER box for HART signal generation.
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