6–10
Block Transfer Programming
Publication 1771ĆUM006B-EN-P - June 2002
Figure 6.8
Example Ladder Logic for PLCĆ5 Block Transfer
EN
BTW
BLOCK TRNSFR WRITE
Rack
Group
Module
Control Block
0
0
0
N10:10
DN
Data File
Length
Continuous
N10:15
0
N
ER
N10:10
15
N11:10
15
EN
BTR
BLOCK TRNSFR READ
Rack
Group
Module
Control Block
0
0
0
N11:10
DN
Data File
Length
Continuous
N11:15
0
N
ER
File 2, Rung 0
File 2, Rung 1
15965
N10:10
15
N11:10
15
Rung Descriptions
Rungs 0 and 1 - Rungs 0 and 1 execute BTW and BTR instructions
alternately. When the processor completes the BTW instruction, it
enables the BTR instruction immediately in the same scan. Enabling
a block transfer instruction places the block transfer request in
queue. There is one queue for each I/O chassis. Waiting time
depends on the number of queued requests ahead of it.
Содержание Allen-Bradley 1771-IJ
Страница 1: ...User Manual Encoder Counter Modules Cat Nos 1771 IJ and 1771 IK Allen Bradley...
Страница 6: ...Using This Manual P 4 Publication 1771 UM006B EN P June 2002...
Страница 26: ...3 6 Installation Publication 1771 UM006B EN P June 2002...
Страница 30: ...4 4 Module Processor Communication Publication 1771 UM006B EN P June 2002...
Страница 44: ...5 14 Single Transfer Programming Publication 1771 UM006B EN P June 2002...
Страница 62: ...Specifications A 4 Publication 1794 UM006B EN P June 2002...