Aaeon PCM-6897/L, Руководство пользователя

Страница: 59 / 69

Compact Board P C M - 6 8 9 7 / L
Appendix A Programming the Watchdog Timer
A -2
A.1 Watchdog timer of PCM-6897/L
PCM-6897/L utilizes ITE 8712 chipset as its watchdog timer
controller. Below are the procedures to complete its configuration
and the AAEON intial watchdog timer program is also attached
based on which you can develop customized program to fit your
application.
A.2 Configuring sequence description
After the hardware reset or power-on reset, the ITE 8712 enters the
normal mode with all logical devices disabled except KBC. The initial
state (enable bit ) of this logical device (KBC) is determined by the
state of pin 121 (DTR1#) at the falling edge of the system reset
during power-on reset.
Hardware Reset
Wait for key string
Check Pass key
MB PnP Mode
Next Data?
Is the data “87h”?
Last Data?
Any other I/O transition cycle
I/O write to 2Eh
Any other I/O transition cycle
Y
I/O write to 2Eh
Y
Y
N
N
N
Hardware Reset
Wait for key string
Check Pass key
MB PnP Mode
Next Data?
Is the data “87h”?
Last Data?
Any other I/O transition cycle
I/O write to 2Eh
Any other I/O transition cycle
Y
I/O write to 2Eh
Y
Y
N
N
N
Hardware Reset
Wait for key string
Check Pass key
MB PnP Mode
Next Data?
Is the data “87h”?
Last Data?
Any other I/O transition cycle
I/O write to 2Eh
Any other I/O transition cycle
Y
I/O write to 2Eh
Y
Y
N
N
N