Aaeon MB-562, Руководство пользователя

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22 MB-562 User's Manual
PCI clock setting (JP6)
JP6 is used for setting the PCI bus clock to synchronize or asynchro-
zize with the CPU clock. In synchronized mode, the PCI bus clock will
be 1/2 CPU clock. In asynchronized mode, the PCI bus clock will be
fixed to 33MHz.
PCI clock setting (JP6)
PCI clock 33 MHz 1/2 CPU clock*
*Default
LCD backlight control (JP7)
The JP7 is a 5-pin invertor connector which could provide the power
for LCD invertor. The following table shows the pin assignments of
JP7. The pin-5 "BKL_ON" is normally active "high". Please refer to
"Power Management Setup" in the BIOS SETUP Menu and select
"LCD off Option" to enable power management.
JP7 offers LCD backlight control signals for your applications. The pin
assignments are as follows:
LCD backlight control (JP7)
PIN Function
1 +12V
2 GND
3 GND
4 NC
5 BKL_ON
1 2 3 1 2 3