Aaeon Gene-6320, Руководство пользователя

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Chapter 3 Award BIOS Setup 51
SDRAM Precharge Control
When "Enabled", all CPU cycles to SDRAM result in an All Banks
Precharge Command on the SDRAM interface.
The choices: Disabled, Enabled.
DRAM Data Integrity Mode
Select Non-ECC or ECC (error-correcting code) according to the
type of installed DRAM.
The choices: Non-ECC, ECC.
System BIOS Cacheable
Selecting "Enabled" allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However,
if any program writes to this memory area, a system error may
result.
The choices: Disabled, Enabled.
Video BIOS Catchable
Selecting "Enabled" allows caching of the video BIOS ROM at
C0000h to C7FFFh, resulting in better video performance. However,
if any program writes to this memory area, a system error may
result.
The choices: Disabled, Enabled.
Video RAM Cacheable
Selecting "Enabled" allows caching of the video memory (RAM) at
A0000h to AFFFFh, resulting in better video performance. Howev-
er, if any program writes to this memory area, a memory access error
may result.
The choices: Disabled, Enabled.