Aaeon AEC-6821, Руководство пользователя

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E m b e d d e d C o n t r o l l e r A E C - 6 8 2 1
Appendix A Programming the Watchdog Timer
A-2
A.1 Programming for AEC-6821 Rev.A
AEC-6821 Rev.A utilizes ITE 8712 chipset as its watchdog timer
controller.
Below are the procedures to complete its configuration and the
AAEON intial watchdog timer program is also attached based on
which you can develop customized program to fit your application.
Configuring Sequence Description
After the hardware reset or power-on reset, the ITE 8712 enters the
normal mode with all logical devices disabled except KBC. The
initial state (enable bit ) of this logical device (KBC) is determined
by the state of pin 121 (DTR1#) at the falling edge of the system
reset during power-on reset.