Tandy 1000 MS-DOS Technical Reference Manual Download

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Summary of Contents for 1000 MS-DOS

Page 1: ......

Page 2: ...DIRECTLY OR INDIRECTLY BY EQUIPMENT OR SOFTWARE SOLD LEASED LICENSED OR FURNISHED BY RADIO SHACK INCLUDING BUT NOT LIMITED TO ANY INTERRUPTION OF SERVICE LOSS OF BUSINESS OR ANTICIPATORY PROFITS OR C...

Page 3: ...Tandy 1000 Technical Reference Manual Tandy 1000 Computer 25 1504...

Page 4: ...cy Tandy Corporation assumes no liability resulting from any errors or omissions in this manual or from the use of the information contained herein The FCC wants you to know Warning This equipment gen...

Page 5: ...Video System Logic 38 Video System Modes 45 Display Modes 45 Operating Modes 46 Graphics Mode 47 System Logic Registers 50 Video Array Register 50 Palette Mask Register 50 Border Color Register 51 Mo...

Page 6: ...ware 91 Theory of Operation Software 92 Keyboard Assembly 101 Keyboard Specifications 101 Key Code Chart 102 Keyboard Timing 104 Keyboard Layout 105 Appendices AI Comparative Tables for IBM PC and PCj...

Page 7: ...ort two built in joystick interfaces a speaker for audio feedback and a light pen interface The Main Unit is the heart of the Tandy 1000 It houses the Main Logic Assembly system power supply and flopp...

Page 8: ...Tandy 1000 Technical Reference Manual Tandy 1000 System Figure 1 2...

Page 9: ...Main Logic Board Option Cards 12 VDC 0 032 Amps Environment Air Temperature System ON 60 to 90 degrees F 15 6 to 32 2 degrees C System OFF 50 to 110 degrees F 10 to 43 degrees C Humidity System ON OF...

Page 10: ...RANCE AREA 2 PLACES o i l l 0 0 CD J 0 0 og O 0 o E 0 l _ 0 l 0 0 0 0 0 0 0 0 CD 0 fJ l CD CD 0 CD 3 CD l 0 l o fJ CD i 0 CD l 0 J J 0 0 0 0 JJ 0 CD 0 020 x 45 CHAMFER 0 CD g CD J o l CD VIEw A A lJ s...

Page 11: ...Tandy 1000 Technical Reference Manual 8E 0 RELIEF J _ 24 38 455 7J 5...

Page 12: ...Tandy 1000 Technical Reference Manual 09J A E lT tI E flOLE 2 PLACES 79 6 40 8 2 4 I r 4 1 6...

Page 13: ...1 5 5 VDC 6 Switch 2 J5 Keyboard Interface 8 Pin Rt Angle Circular Din 1 KBDDATA 2 KBDBUSY 3 Ground 4 KBDCLK 5 5 VDC 6 KBDRST 7 MULTIDATA 8 MULTICLK J6 Floppy Disk Interface Dual 17 Pin Vertical Head...

Page 14: ...C 3 5 VDC 5 Ground 7 Ground 9 12 VDC J8 J9 J10 Expansion Interface Connectors Dual 31 Pin Card Edge A01 NMI A02 07 A03 06 A04 05 A05 04 A06 03 A07 02 A08 01 A09 01 A10 READY A11 AEN A12 A19 A13 A18 A1...

Page 15: ...CK 20 Ground 21 PPBUSY 22 Ground 23 PPPAEM 24 Ground 25 PPBUSY 26 NC 27 Ground 28 PPFAULT 29 NC 30 PPINIT 31 Ground 32 PPAUTOFEED 33 Ground 34 NC J12 Light Pen 9 Pin Connector Male Rt Angle D Subminia...

Page 16: ...A board is installed IBM This signal is always available on the IBM PC TAN DY 1000 DMA grant 3 is only available on the I O bus when the MemorylDMA board is installed IBM 5VDC is always available TAN...

Page 17: ...ionally the same as those on the IBM PC however the Tandy 1000 was designed with an FOC Controller on the main logic board and the OMA Con troller on the optional memory board The IBM PC has the OMA C...

Page 18: ...Tandy 1000 12 Technical Reference Manual...

Page 19: ...e capability for output signals and actual load for input signals The drive load is defined in unit loads and speCified as high low This speCification is for the main logiC board only Some signals hav...

Page 20: ...I SYSTEM WAIT AEN IR4 AUDIO IN BREQ IR2 IR3 RESET READY 1 MOS load 40 160 UL Dedicated output acknowledges from DMA Drive 8237A 5 9517A 2 2 UL Load 8237A 5 9517A REFRESH DACK1 FDCDACK DACK3 DR03 DR01...

Page 21: ...S e 62 MAX l I l f 20 40 ALE W_I_DT_H_ _17_0_M_IN_IM_U_M j 1 30 55 I 30 55 IOR MEMR IL JI jf 30 55 H 30 55 IL __ c SET 75 I I r H g e 11 30 55 11 30 55 IOW MEMW JL i r 30 55 n 30 55 DEN WRITE I r J I...

Page 22: ...Tandy 1000 Technical Reference Manual 35 1 I 1 35 1 1 70 OSC 14 31 MHZ 72 j f 125 210 l ClK 4 77 MHZ I 210 I 210 1 02 ClK 2 385 MH I I Figure 2 1 CPU BUS Timing Signal 16...

Page 23: ...address and data lines To separate and save the address that comes out first the signals are applied to U61 74LS373 and latched by ALE Additionally the signals are applied to data transceiver U62 74L...

Page 24: ...M Control The main system timing starts with the 28 63636 MHz oscillator This oscillator is a single package which produces a TTL output From the oscillator U39 divides the master frequency into 4 mul...

Page 25: ...EN ME FU E3 FUN TIMING INT GEN CNTLR r f EXPANSION ADDRESS 1 1 1 I CONTROL I DATA L i I L_ NNECTORS_ 1 0 V 0 6 DECODE I 6 OJ OJ 5 5 m 5 0 OJ i 0 5 5 0 m OG 5 OOJ C i _KEYBD_ m OJ 6 0 SOUND OJ 0 PARALL...

Page 26: ...14 31818 7 15909 3 57954 1 7897725 RAS MUX CAS ST 15 DYMUX fRWC 279 NS fRAS 174 6 NS f CAS 174 6 NS fRP 104 76 NS ___ r 1l L J CPULT cPU I VIDEO I CPU VIDEO CPU I VIDEO 1011121 141516171819 bfllllll12...

Page 27: ...2 MC1 19 18 17 MC3 MC2 MC1 19 18 17 MC3 MC2 MC1 RFSH MEMR 19 18 17 MC3 MC2 MC1 RFSH MEMW 19 18 17 MC3 MC2 MC1 19 18 17 MC3 MC2 MC1 19 18 17 MC3 MC2 MC1 RFSH MEMW 19 18 17 MC3 MC2 MC1 HGMEMAC HGMEMAC R...

Page 28: ...PIOCS NMICS SNDCS Addresses 15 14 13 12 11 10 9 8 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 1 1 100SEL 6 5 4 3 100SEL 6 5 4 3 IOOSEL 6 5 4 3 101 SEL 6 5...

Page 29: ...SSO MEMW during IOR HLDA 101M B DT R SSO HLDA 101M B DT R HLDA 101M B DT R SSO HLDA 101M B DT R SSO HLDA 101M A DT R SSO HLDA 101M A DTR U103 Video Address Decode Code 103C Checksum 4480 GACS STATUS...

Page 30: ...ped by C T2 Signal B is started by A and T1 and stopped by CPUREADY and 0 Signal C is started by B T2 and stopped by BNOT T3 Signal 0 is started by C T2 and stopped by CNOT T3 Characteristically A is...

Page 31: ...MINIMUM WIDTH 11 1 I I 8 I x 1 11 ___ L __ _ _ 1l 111l i 21 7 I T4 T1 T2 TW T3 T4 A 4A 4 5 6 7 8 9 I 38 48 ALEIGPU SSO OT A 101M CPUGLK DEN READ IDA MEMA _2 7 WRITE 10W MEMW EARLY r NORMAL I Jtz t 3_W...

Page 32: ...5 NC 5 5 04 FDCDMAR0 03 12VDC 02 AUDIO IN 01 12VDC 00 GND 10 10 READY MEMW AEN MEMR A19 IOW A18 IOR A17 DACK3 15 15 A16 DRQ3 A15 DACK1 A14 DRQ1 A13 REFRESH A12 ClK 20 20 A11 RFSHRQ A10 BREQ A09 NC A08...

Page 33: ...upts are 0 Timer Channel 0 1 Keyboard 2 Hard Disk Controller 3 Modem 4 RS 232 5 Vertical Sync 6 Disk Controller Floppy 7 Printer Software Timer Keyboard Code Received Optional Function Interrupt on Bu...

Page 34: ...RUCTURE NMI i t NMI NMI ENABLE INTR 8 88 CPU 8259A INTERRUPT CONTROLLER INTERRUPT FUNCTION NMI AVAILABLE ON BUS 8253 TIMER CH 1 KEYBOARD 2 HARD DISK 3 SECONDARY COMM 4 PRIMARY COMM 5 VERTICAL SYNC 6 F...

Page 35: ...or and 4 outputs including the keyboard multifunction interface signals See Figure 8 Keyboard Data The computer receives data from the keyboard in an asynchronous serial for mat with one 8 bit word fo...

Page 36: ...PPI PORT ASSIGNMENTS PA KEYBOARD DATA IN BIT f J 1 2 3 4 5 6 PA7 KEYBOARD DATA IN BIT 7 PB TIMER CHANNEL 2 GATE SPEAKERDATA i i SOUND CNTRL f J SOUND CNTRL 1 PB7 KEYBOARD DATA CLEAR PCf J KEYBOARD DIS...

Page 37: ...circuit The internal sound circuit is directly connected to the speaker via U118 The source of the sound frequencies is U96 Complex Sound Generator Internally U96 has four programmable sound generator...

Page 38: ...M TIMER 8253 5 8253 5 TIMER HI GATE OUT I lf CPU INT 1 1925 MHZ 1 C K GATE 1 OUT 1 LLDRQ GATE 2 CC ACK OUT 2 1 Pl PC5 P1 PB P1 PB1 _ I SOUND CH CHANNEL MODE INTERRUPT ON TIC 1 MODE NEGATIVE PULSE ON T...

Page 39: ...C 76496 AUDIO IN IODO IOD7 1 SNDCS q lOW q AUDIO OUT INTERNAL SPEAKER 10K AUDIO IN TMR 2 8253 OUT 2 SEL 8255 PB1 A B SPKDATA 8255 PB5 SNDCNTL0 8255 PB6 SNDCNTL1 4 1 MUX CMOS SWITCH 14529 AMPLIFIER __...

Page 40: ...comparator output goes true This com parator output is the X or Y position data bit The ramp is reset to 0 0 VDC whenever a write is made at Port 200 201 Hex The 10W signal turns on 02 which drains C...

Page 41: ...TA BUS L SWA SWB 1 5V COMPARATORS XPOS 1 YPOS IOW JOYSTKCS d lOR JOYSTKCS PROGRAMMING CONSIDERAnONS lOR s REGULAR INTERVALS ONCE TRIGGERED BY SOFTWARE THE INTERGRATOR CIRCUIT PRODUCES A PULSE THE DURA...

Page 42: ...BlE LEO BUSY BUSY ACK PE FAULT EDATA0 EDATA7 DO 8 ClK OE D 8 V 8 I I 8 0 10 OE 2 SEl 3D OUTPUT ENAB A B A B 6 JdSEL o DO 1 2 0 ClK 3 f H C 1 0 BIT 3 BIT 7 1 6 INT ENA OE Y a r I ACK BIT 0 BIT 5 Y 5 J...

Page 43: ...AO A1 function decode FOCCS and lOR lOW The function decode FOCOS is separated into the lower four address range for the DaR register and into the upper four address range for the FOC both are inhibi...

Page 44: ...and column addresses for the dynamic RAM chips The Video Memory is composed of two 8 bit rows of 64K dynamic RAMs 64K x 8 x 2 that is shared by the video and the CPU 8088 The video system sees the me...

Page 45: ...00 PROCESSOR READ WRITE OPERATIONS AT 88000 C0000 ACCESS I OF 4 PAGES o PAGE 7 PAGE 6 1 17FFFF PAGE 5 1 PAGE 4 PAGE 3 PAGE 2 I _ _ J 07FFF PAGE I L _ _ P A G E 0 J 00000 THE VIDEO OISPLA S I OF 4 32K...

Page 46: ...nd then loaded into the shift register The mode selection multiplexer selects alpha 2 color 4 color medium resolution 4 color high resolu tion or 16 color modes The output of the mode selection multip...

Page 47: ...mn Address Setup Time tASC 0 ns Column Address Hold Time tCAH 35 ns Transition Time Rise and Fall tT 50 ns Read Command Setup Time tRCS 0 ns Read Command Hold Time tRCH 0 ns Read Command Hold Time tRR...

Page 48: ...CPU ADDRESS BUS CPU DATA BUS MC6B45 VIDEO ADDRESS AND TIMING GENERATOR LS273 PAGE REG CPU A14 A16 VIDEO ADDRESS HIGH MEMORY ACCESS MUX BB000 ROW COLUMN ROW COLUMN DRAM ADDRESS 4 I ADDRESS MUX COMPOSIT...

Page 49: ...Tandy 1000 Technical Reference Manual RMD0 RMD7 1001 1005 Composite COLOR VIDEO ARRAY BLOCK DIAGRAM Figure 14 43...

Page 50: ...oooo 9 0000 8 0000 7 0000 RAM Only 6 0000 5 0000 4 0000 3 0000 2 0000 0000 0 0000 44 Memory Map see Pon OOAO ROMCSO A M 1 Video Ont 10 9 8 7 6 5 4 3 2 1 0 MEMCONFIG 3 MEMCONFIG 2 MEMCONFIG 1 Page 5 1...

Page 51: ...2 4 or 16 These 16 colors are defined by combinations of the RGBI as shown in the col or chart below and can be used for foreground background and character blinking If you are using a black and white...

Page 52: ...sing Scientific Notation characters In both modes all characters are 7 dots wide by 7 dots high and are placed in an 8 dot wide by 8 or 9 dot high matrix In both the 40 x 25 mode and the 80 x 25 mode...

Page 53: ...tion Graphics Memory Usage Graphics memory uses either two or four banks of 8000 bytes In either case pixel information for the display s upper left corner is found at address 0000 The 4 color high re...

Page 54: ...yte 1 seventh pixel Byte 2 sixth pixel Byte 3 fifth pixel Byte 4 fourth pixel Byte 5 third pixel Byte 6 second pixel Byte 7 first pixel High Resolution 4 Color Graphics Odd Bytes PA1 7 PA1 6 PA1 5 PA1...

Page 55: ...works with all types of display devices This mode contains 200 rows of 160 pixels requires 16K bytes of read write memory specifies 16 colors for each pixel by the RGBI bits and formats 2 pixels per b...

Page 56: ...Array registers except 308 and 309 Registers are programmed by first writing an address to 30A and the data to 30E The following chart shows the address at each of these Video Array registers Register...

Page 57: ...nition Table listed in this section Mode Control Register This 5 bit write only register is accessed at the video array address 03H The following table gives the register s bit functions Bit Descripti...

Page 58: ...blanking and the address register should be changed to less than 10 prior to returning to normal operation During the normal display operation the RGBI information is used to address the palette as s...

Page 59: ...ata 30F CRT Processor Page Register Operation of the video subsystem and mode selection is controlled by the registers listed in the above table The video array registers at 30A were ex plained earlie...

Page 60: ...4 Vertical Total 1C 28 1C 28 7F 127 3F 63 1F 31 1F 31 7F 127 3F 63 05 Vertical 01 1 01 1 06 6 06 6 06 6 06 6 06 6 06 6 Total Adjust 06 Vertical 19 25 19 25 64 100 32 50 19 25 19 25 64 100 32 50 Displa...

Page 61: ...Enable This bit enables or disables the video display A 1 enables the video display 4 640 Dot Graphics This bit is used to select either of the two 640 x 200 graphics modes A 1 selects 640 x 200 5 Bl...

Page 62: ...0 When bit 0 is 0 the display is active When 1 this indicates video is not displayed Bit 1 When bit 1 is high this indicates that the light pen input has a positive going edge and has set the light p...

Page 63: ...ocessor Page Register CRT Page 0 2 Bits 0 2 select the 16K page used by the video In 32K modes bit 0 is ignored Processor Page 0 2 These processor page bits are combined with the CPU address to select...

Page 64: ...a a a a a a a a 1 Bit 3 4Color 30A Reg 03 a a a 1 a a 1 a a Bit 4 16 Color I O Map Address Block Usage Function 0000 001 F 0000 OOOF OMA Function 0020 003F 0020 0021 Interrl Jpt Controller 0040 005F 0...

Page 65: ...ROM FOOOO To FFFFF Two 32K address segments are decoded in hardware There will always be one system ROM located at the boot segment F8000 FFFFF The second system ROM will be limited to the second add...

Page 66: ...Controller 8237A 5 DMA Controller 8237A 5 DMA Controller 8237A 5 DMA Controller 8237A 5 DMA Controller Description 8259A Interrupt Controller 8259A Interrupt Controller 8259A Interrupt Controller 825...

Page 67: ...d Not used Not used Not used Not used Not used Not used Description 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI 8255A 5 PPI Not used Not used Not used Not used...

Page 68: ...OR WRITE Bit Description o 1 8253 Gate 2 Enabled 1 Speaker Data Out 2 Not used 3 Not used 4 Not Used 5 Sound Control 0 6 Sount Control 1 7 1 Keyboard Clear 0062 PORT C READ WRITEs Bit Description 0 O...

Page 69: ...81 WRITE ONLY Address Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Description DMA Ch 2 Address A16 DMA Ch 2 Address A17 DMA Ch 2 Address A18 DMA Ch 2 Address A19 Not used Not used Not used Not use...

Page 70: ...CH 0 1 Address A16 DMA CH 0 1 Address A1 DMA CH 0 1 Address A18 DMA CH 0 1 Address A19 Not used Not used Not used Not used Description NMI Mask Register NMI Mask Register NMI Mask Register NMI Mask R...

Page 71: ...6 Sound SN76496 Sound SN76496 Sound SN76496 Sound SN76496 Sound SN76496 Sound SN76496 Sound SN76496 Not used Not used Not used Not used Not used Not used Not used Not used Description Not Used MEMCONF...

Page 72: ...Joystick Joystick Joystick Joystick Not used Not used Not used Not used Not used Not used Not used Not used Description R X Position R Y Position L X Position L Y Position R Button 1 R BtJtton 2 L But...

Page 73: ...7 MSB Description Not used Not used Not used o Error 1 Printer Selected o End Of Form o Acknowledge o Busy Description Not used Not used Not used Not used Not used Not used Not used Not used Printer D...

Page 74: ...ct Printer 1 Enable Interrupt o Enable Output Data Not used Not used Memory Map Not used Not used Not used Not used 6845 Address Register 6845 Data Register Not used Not used Mode Select Register Colo...

Page 75: ...Switch Status Vertical Retrace Not Used Write 3DE Not Used Not Used Not Used Not Used Not Used Palette Mask 0 Palette Mask 1 Palette Mask 2 Palette Mask 3 Border Blue Border Green Border Red Border In...

Page 76: ...ite Video Enable 640 Dot Graphics Blink Enable Background Blue Background Green Background Red Background Intensity Foreground Intensity Color Select Description CRT Page 0 CRT Page 1 CRT Page 2 Proce...

Page 77: ...Select A Drive Select B o FDC Reset Enable DMA Req lnterrupt 1 Drive A Motor On 1 Drive B Motor On 1 FDC Terminal Count Not Used o 1 2 3 4 5 6 7 3F2 WRITE ONLY Bit To Select Drive A Bit 0 Bit 1 To Sel...

Page 78: ...ith E3 E4 jumpered no DMA is present and the memory starting address is 40000 hex Without a jumper at this location DMA is present and the memory starting address is 00000 hex If jumper E3 E4 is prese...

Page 79: ...FRESH cycles have all four RAS signals active simultaneously No AMUX or CAS signals go active during a REFRESH cycle The Dynamic Memory lines between AO A and A8 A15 are multiplexed by U6 and U1 0 wit...

Page 80: ...refreshed OMA Channel 2 is assigned to the Floppy Disk Controller OMA Channels 1 and 3 are uncommitted and are available on the bus The OMA Controller multiplexes data bits 00 07 with address bits A8...

Page 81: ...Tandy 1000 CONTROL DMA BLOCK DIAGRAM Figure 15 76 Technical Reference Manual LEDGEND DIR DIRECTION L LATCH B BUFFER T TRANSCEIVER...

Page 82: ...rformed by the ACE as well as any error conditions The WD8250 includes a programmable baud rate generator that allows operation from 50 to 9600 baud The WD8250 can be software tailored to the user s r...

Page 83: ...registers is done by using the divisor latch access bit Bit 7 of the line control register One interrupt is provided to the system for IRQ4 for primary operation and IRQ3 for secondary operation This...

Page 84: ...hen chip has been selected a low DISTR or high DISTR will allow a read of the selected WD8250 register a CPU read Only one of these lines need be used Tie unused line to its inactive state DiSii l hig...

Page 85: ...rt TRANSMIITER TIMING Figure 17 80...

Page 86: ...Tandy 1000 WD8250 Technical Reference Manual 1 1 WRITE CYCLE TIMING BAUDOUT TIMING I I III 1 r L r __ c 1 c wo c o T RECEIVER TIMING Figure 18 81...

Page 87: ...Technical Reference Manual Address i Bus o L q i W j Data Bus 0 25 8250 Pin ACE D Interrupt Shell Conn I 1 I S i Oscillator w 1 8432 a MHz Figure 19 RS 232 Asynchronous Communications Adapter Block D...

Page 88: ...rating in the secondary REQUEST address space 10 GROUND 11 PRIMARY IORQ4 Sends interrupts to the CPU while INTERRUPT operating in the primary REQUEST address space 12 PRIMARY OR ParS An input that det...

Page 89: ...Tandy 1000 Technical Reference Manual...

Page 90: ...ocessor U7 and simple ASCII commands control the operation of the modem These ASCII commands are supplied through the on board UART The UART converts parallel commands to serial data for the modem The...

Page 91: ...Transmit Section Serial data from the UART is supplied at Pin 11 of U8 The modem chip U1 frequency modulates the high and low state of the input at Pin 11 and generates transmit carrier Transmit carr...

Page 92: ...short out the output of the limiter at Pin 2 When Pin 14 goes high it actually forces a tran sistor to turn off and allow limited carrier to be applied to Pin 1 of U1 Of course if there are fewer than...

Page 93: ...s configured as an input pin At this time the microprocessor is monitoring any data being received by the modem Since R15 is not driven high by pin 12 any more the normal transitions on Pin 7 of U1 co...

Page 94: ...tween the contacts of K2 and the primary of T1 When the modem pulse dials K1 switches on and off breaking and making the T1 connection to TIP and RING The Central Office detects these makes and breaks...

Page 95: ...Tandy 1000 Technical Reference Manual Figure 21 90...

Page 96: ...to 35 C Storage Temperature Range 40 to 160 F 40 to 71 C Theory of Operation Hardware Look at the block diagram Figure 22 while reading the information below Bus IfF Data address and control signals o...

Page 97: ...Buffers and Filters A 9 Pin DB jack at J2 connects the DIGI Mouse to the clock calendar board RC filtering is used to reduce noise in the inputs U4 a CMOS hex schmitt trigger provides further bufferin...

Page 98: ...Tandy 1000 Technical Reference Manual J2 to 1000 Bus 8042 Processor D 5v BAT Figure 22 DIGI MousefClock Controller Board Block Diagram IfF 93...

Page 99: ...status Bit 7 Calendar power status 1 full 1 full 1 button up 1 button up 1 button up 1 button up 1 power has failed Written to by the 8088 This is the same as for the data written to Data Port 2FC ex...

Page 100: ...interrupted every time data is written to the input port 2FC or 2FE which set the command flag The 8042 moves the data from the input register into the input buffer and increments a counter It then re...

Page 101: ...atched interrupt only after all the data packet is transmitted it uses the common procedure outlined below Mode 3 Poll only mode This mode does not use the interrupt signal at all It uses only the out...

Page 102: ...rt 2FE Mouse data All data Motion data only Mouse data Button data only Read time data B R none data found in status register Port 2FE bits 4 5 6 4 bytes of data in BCD format 1st byte minutes 2nd byt...

Page 103: ...the status of the buttons If there is the 8042 sends a copy to the status register 3 Next the 8042 determines the Delta x changes or Delta y changes Both Deltas use the same process 4 The 8042 retrie...

Page 104: ...he interrupt line and returns to normal opera tions If the output buffer is empty the 8042 simply returns to normal opera tion Connected to the timer is the timed data transfer interrupt When the time...

Page 105: ...Tandy 1000 Technical Reference Manual...

Page 106: ...SSOR 3 CLOCK 4 BUSY t5 VCC GND Keyboard Assembly Connector Figure 23 Keyboard Specifications The keyboard is fully encoded with microprocessor control and requires 5 VDC supplied from the Main Unit 1...

Page 107: ...41 42 43 45 102 Legend F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 INSERT DELETE BREAK ESC 1 I 2 3 4 5 6 1 7 8 9 0 BACKSPACE ALT PRINT 7 backslash 8 Tilde 9 PG UP TAB o W E R T Y U I P Technical Reference...

Page 108: ...50 51 3A 2A 2C 20 2E 2F 30 31 32 33 34 35 36 2B 4A 4E 52 56 57 HOME 1 END 2 Grave 3 PG ON CAPS SHIFT Z X C V B N M t SHIFT HOLD NUM LOCK 4 5 6 CTRL A S o F G H J K L 46 47 48 49 50 51 52 53 54 55 56 5...

Page 109: ...Tandy 1000 Keyboard Timing Technical Reference Manual Figure 24 is the timing chart for the Tandy 1000 Keyboard Assembly END OF DATA CLOCK FROM KEYBOARD Keyboard Assembly Timing Chart Figure 24 104...

Page 110: ...keyboard They should be used with the Key Code Chart for determining data value transmitted by the keyboard F 1 ESC Figure 25 Keyboard Identification CJ HOLD L 4 HOME END I o DELETE BREAK PG UP 9 PG...

Page 111: ...I rB ESC Il A I r rr l Iru j1 LT PRINT PG 9 u l J l 9 j ILa 111 all w1l 1 1 T1 11 ull 11 0 IL f 11 ill nlr HOLD r ouc 8 61 lCTRL J1Il If SIlo 1 III Il Il Il ENTER i HOME l1 lJ rfc JI SHfETll 1 lIe 111...

Page 112: ...wledges permission by the following to reprint their copyrighted material in this manual Teac Corporation 3 7 3 Naka Cho Musashimo Tokyo Japan IBM PC and IBM PCjr P O Box 1328 W Boac Raton Florida 334...

Page 113: ...Tandy 1000 Technical Reference Manual...

Page 114: ...Tandy 1000 Technical Reference Manual Comparative Tables for IBM PC and PCjr Computers...

Page 115: ...Tandy 1000 Technical Reference Manual...

Page 116: ...ORTS THRU IF 8 9 A B C D E F 8237A S DMA CONTROLLER 8237A S DMA CONTROLLER AI AIS NOT DECODED NO DMA FUNCTION AVAlLABLE CHIP SELECT FROM A4 AIS CHIP SELECT FROM AS A9 A AI A2 A3 TO IC A AI A2 A3 TO IC...

Page 117: ...RUPT CONTROLLER 8259A INTERRUPT CONTROLLER 28 29 2A 2B SAME AS 2 27 2C 2D 2E 2F 8259A INTERRUPT CONTROLLER AI AI5 NOT DECODED X AI AI5 NOT DECODED X DECODE A3 AI5 B CHIP SELECT FROM A9 A5 AI A2 X A I...

Page 118: ...PPI 8 9 A B C D E 6 F 8255A 5 PPI AI AI5 NOT DECODED Xl AI AI5 NOT DECODED Xl AI A DECODEDI e CHIP SELECT FROM A9 AS CHIP SELECT FROM A9 A3 CHIP SELECT FROM A3 A15 AI A I C AI A _I C ASSIGNED ADDRESS...

Page 119: ...8 9 A B DUPLICATES 40 47 C D E F 8253 5 TIMER AI AI5 NOT DECODED Xl AI AI5 NOT DECODED DECODE A3 AI5 CHIP SELECT FROM A9 A5 CHIP SELECT FROM A9 A3 A __ DECODE BY I C Al A 1 C Al A _I C ASSIGNED ADDRES...

Page 120: ...SCAN CODE I CONFIG SWI RESERVED KEYBOARD BIT LSB BIT I 2 I BIT 2 3 2 BIT 3 4 3 BIT 4 5 4 BIT 5 6 5 BIT6 7 6 BIT 7 KEYBOARD SCAN CODE I CONFIG SW8 RESERVED KEYBOARD BIT 7 MSB SEE IBM TECH REFERENCE SE...

Page 121: ...UNCTION CONFIG SW 13 THRU 16 I O CHAN ROM SIZE OR ENABLE READING CONFIG SW 12 PC PC3j BIT 3 1 CASSETTE MOTOR OFF SAME NO FUNCTION BIT 4 ENABLE RAM PARITY 1 DISABLE CASSETTE MTR NOT USED RELAY INTERNAL...

Page 122: ...SW14 DISKETTE DRIVE INSTALLED OUT MULTI LOCK BIT 3 CONFIGSW13 64K RAM EXPANSION OUT NOT USED INSTALLED BIT 4 CASSETTE DATA IN SAME IN NOT USED BIT 5 8253 CUT 2 SAME IN SAME BIT 6 1 I O CH CK PARITY ER...

Page 123: ...2 2 CH 3 CH3 3 CH 1 DMA PAGE REG CH I 4 REPEATED THRU 9F S 6 7 8 9 A B C D E 8 F DMA PAGE REG AI AIS NOT DECODED NO DMA FUNCTION CHIP SELECT FROM A3 AIS CHIP SELECT FROM AS A9 A AI TO IC A Al TO IC A...

Page 124: ...1 2 3 4 S 6 7 PORT A NMI MASK REGISTER 8 9 A B C D E A F NMI MASK REGISTER Al AlS NOT DECODED Xl Al AlS NOT DECODED AO Al A2 X CHIP SELECT FROM A9 AS l CHIP SELECT FROM A9 A3 A A4 X A A2 X ADDRESS RA...

Page 125: ...6 SOUND SN76496 I 2 3 4 5 6 7 SOUND SN 76496 SOUND SN76496 8 9 A B C D E C F RESERVED NO FUNCTION WRITE ONLY FUNCTION CHIP SELECT DECODED READ WILL CAUSE HANG UP FOR WRITE ONLY WAIT REQUIRED 42 STATES...

Page 126: ...ONTROL ADAPTER F AI AI5 NOT DECODED Xl AI AI5 NOT DECODED X A AI A2 X CHIP SELECT FROM A9 A CHIP SELECT FROM A9 A ASSIGNED ADDRESS ADAPTER DATA BUS DRIVER MUST ADAPTER DATA BUS DRIVER MUST 2 21 BE INA...

Page 127: ...TCH D READ STATUS READ STATUS E CONTROL LATCH CONTROL LATCH 0 3 7 F PRINTER NO FUNCTION PRINTER NO FUNCTION PRINTER NO FUNCTION AI0 AI5 NOT DECODED Xl AI0 AI5 NOT DECODED Xl A0 Al DECODED BY A2 X A0 A...

Page 128: ...3DA READ STATUS REGISTER WRITE GATE ARRAY ADDRESS DATA WRITE VIDEO ARRAY ADDRESS READ STATUS READ STATUS 3DB CLEAR LIGHT PEN LATCH CLEAR LIGHT PEN LATCH CLEAR LIGHT PEN LATCH 3DC PRESET LIGHT PEN LAT...

Page 129: ...WRITE ONLY 4 STATUS READ ONLY FDC STATUS READ ONLY 5 FDC DATA R W I DATA R W 6 STATUS READ 7 FDC DATA R W 8 9 A B C D E 3 F F FDC FUNCTION SELECT IS FROM IBM PCjr FDC FX Al X A3 A9 FDC A A FDC CSV Al...

Page 130: ...2 IH BIT3 NOT USED PALETTE MASK 3 PALETTE MASK 3 1 2 BIT I NOT USED BORDER BLUE BORDER BLUE 1 2 BIT I NOT USED BORDER GREEN BORDER GREEN In BIT 2 NOT USED BORDER RED BORDER RED 1 2 BIT 3 NOT USED BOR...

Page 131: ...IBM PC IBM PCjr TANDY 1 DATA 81 WRITE ONLY BIT DMA CH2 ADDRESS Al6 I I I I Al7 2 l Al8 SAME SAME 3 DMA CH2 ADDRESSAl9 4 NO USE 5 I 6 BIT 7 NO USE DMA OPTIONAL ON PCjr DMA OPTIONAL ON TANDY l o o o...

Page 132: ...IBM PC IBM PCjr TANDY 1000 DATA 82 WRITE ONLY BIT DMA CH3 ADDRESS A16 1 I I I Al7 2 A18 SAME SAME 3 DMA CH3 ADDRESS Al9 4 NO USE 5 I 6 J BlT7 NO USE o o o...

Page 133: ...IBM PC IBM PCjr TANDY 1 DATA 83 WRITE ONLY BIT DMA CH0 1 ADDRESS AI6 I I I I A17 2 J J AI8 SAME SAME 3 DMA CH I ADDRESS AI9 4 NO USE 5 I 6 J BIT 7 NO USE o o o...

Page 134: ...3DF BIT 2 NOT USED CRT PAGE 2 CRT PAGE 2 3DF BIT 3 NOT USED PROCESSOR PAGE 1 PROCESSOR PAGE 1 3DF BIT 4 NOT USED PROCESSOR PAGE 2 PROCESSOR PAGE 2 3DF BIT 5 NOT USED PROCESSOR PAGE 3 PROCESSOR PAGE 3...

Page 135: ...RESET NOT USED FDC RESET BIT 3 1 ENABLE INTERRUPT DMA NOT USED 1 ENABLE DMA REQ INTERRUPT BIT 4 1 DRIVE MOTOR 1 ON NOT USED 1 DRIVE MOTOR ON BIT 5 I 2 I WATCH DOG TIMER ENABLE 1 DRIVE 1 MOTOR ON BIT 6...

Page 136: ...NOT USED VIDEO ENABLE 3D8 BIT 4 640 DOT GRAPHICS NOT USED 640 DOT GRAPHICS 3D8 BIT 5 BLINK ENABLE NOT USED BLINK ENABLE 3D9 BIT BACKGROUND BLUE NOT USED BACKGROUND BLUE 3D9 BIT 1 BACKGROUND GREEN NOT...

Page 137: ...T I AUTO FD XT AUTOFDXT AUTO FD XT BIT 2 INITIALIZE INITIALIZE INITIALIZE BIT 3 SELECT PRINTER SELECT PRINTER SELECT PRINTER BIT 4 1 ENABLE INTERRUPT 1 ENABLE INTERRUPT 1 ENABLE INTERRUPT BIT 5 UNUSED...

Page 138: ...T 5 DATA BIT 5 DATA BIT 5 DATA BIT 5 BIT 6 DATA BIT 6 DATA BIT 6 DATA BIT 6 BIT 7 DATA BIT 7 MSB DATA BIT 7 MSB DATA BIT 7 MSB 0379 037D READ ONLY 0379 037D READ ONLY 0379 BIT UNUSED UNUSED UNUSED BIT...

Page 139: ...TTON 1 LBUTTON 1 BIT 5 A BUTTON 2 A BUTTON 2 L BUTTON 2 BIT 6 B BUTTON 1 B BUTTON 1 R BUTTON 1 BIT 7 B BUTTON 2 B BUTTON 2 R BUTTON 2 WRITE TO PORT STARTS WRITE TO 2 RESTARTS TIMING PERIOD INTEGRATOR...

Page 140: ...BIT 4 1 DISABLE HRQ BUS HOLD REQ X BIT 5 J TIMER CLK 2 1 1925 MHZ X TIMER CLK 2 CLK 1 OUT BIT 6 X 1 IR TEST X BIT 7 1 ENABLE NMI 1 EN ABLE NMI 1 ENABLE NMI READ FROM C JAC J NO FUNCTION READ FROM A A...

Page 141: ...Tandy 1000 Technical Reference Manual...

Page 142: ...Tandy 1000 Technical Reference Manual Printer Specifications...

Page 143: ...Tandy 1000 Technical Reference Manual...

Page 144: ...4 4 4 4 35 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 36 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 37 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 38 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 39 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 3A 3B...

Page 145: ...X X X X X X X X X 61 a a a a a a a a a a a a a a a a a 62 b b b b b b b b b b b b b b b b b 63 c c c c c c c c c c c c c c c c c 64d d d d d d d d d d d d d d d d d 65 e e e e e e e e e e e e e e e e...

Page 146: ...0 A7 A8 t A9 AA AB AC 1 4 AD AE AF DMP 2100P 1274 X X X X X X X X X X X X X X DMP 430 1277 x X X X X X X X X X X X X X X X DMP 105 1276 X X X X X X X X X X X X X X X DMP 130 1280 X X X X X X X X X X...

Page 147: ...X X X X X I BA Tm X X X X X X X II BB e X X X X X X X BC U X X X X X X X I BD e X X X X X X X u BE X X X X X X X I BF f X X X X X X X C a X X X X X L Cl X X X X X J C2 i X X X X X T C3 0 X X X X X C4...

Page 148: ...E4 X X X X X X X l E5 X X X X X X X a E6 X X X X X X X J1 E7 X X X X X X X T E8 _ X X X X X X X E9 X X X X X X X e EA X X X X X X X Q EB r X X X X X X X 8 EC X X X X X X X 00 ED X X X X X X X P EE X X...

Page 149: ...1276 1280 1278 1275 1272 Code 1 NUL NUL NUL NUL NUL NUL NUL NUL NUL 2 3 4 5 6 7 BEL BEL BEL 8 BM BM BM BS BM BS 9 HT LF HT A LF LF LF LF LF LF LF LF LF B VT C FF FF FF FF FF FF FF D TR CR CR CR TR CR...

Page 150: ...1 IB 14 16 16 16 16 16 16 EE IB 15 CR CR CR CR CR CR CR IB 16 TR TR TR TR TR TR TR IB 17 12 12 12 EF CM 12 IB 18 XP XP CAN IB 19 EX EX IB lA 48L 48L 48L IB lC HF HF HF 12L HF HF 12L 12L 12L IB 10 CE...

Page 151: ...42 100 100 lC SVT IB 43 CS FL IB 44 RES SHT IB 45 SHT SHT SM IB 46 EM IB 47 7LF SB IB 48 PS PS PS PS EB IB 49 HG HG FS IB 4B PI 6B lD4C P2 12B IB 4D MF MF MF IB 4E Dll PS IB4F ES IB 5 D43 Pn IB 51 LM...

Page 152: ...e feed 21n n 36 line feed 216 n lines inch or n 216 inch line feed 72n n 72 line feed executes n 72 inch line feed 72S n 721ine feed sets n 72 inch line feed no motion 6B select 6 dots inch bit image...

Page 153: ...qual Technical Reference Manual of bytes in control code 2 2 3 1 2 2 1 2 2 1 2 2 1 2 2 2 1 1 2 2 1 3 2 3 HF HG HP HR HT IB Ie 1M 100 IP ISO LF LM MF Mn MD NLQ NQE NQP NUL PI P2 PF PN PS half line fee...

Page 154: ...n end underline set forward linefeed set horizontal tab select emphasized horizontal double strike select CR CR LF select proportional characters select proportional font sets page length set reverse...

Page 155: ...Tandy 1000 Technical Reference Manual...

Page 156: ...roprocessor implemented in N channel depletion load silicon gate technology HMOS and packaged in a 40 pin CerDIP package The processor has attributes of both B and 16 bit microprocessors It is directl...

Page 157: ...e to absolute maximum rating conditions for extended periods may affect device reliability D C CHARACTERISTICS 6066 TA O C to 70 C Vee 5V 10 6066 2 TA O C to 70 C Vee 5V 5 Symbol Parameter Min Max Uni...

Page 158: ...ime 10 10 ns to 3 5V TCL2CL1 CLK Fall Time 10 10 From 3 5V ns to 1 0V TDVCL Data in Setup Time 30 20 ns TCLDX Data in Hold Time 10 10 ns ROY Setup Time TR1VCL into 6284 See 35 35 ns Notes 1 2 ROY Hold...

Page 159: ...WHDX Data Hold Time After WR TCLCH 30 TCLCH 30 ns internal loads TCVCTV Control Active Delay 1 10 110 10 70 ns TCHCTV Control Active Delay 2 10 110 10 60 ns TCVCTX Control Inactive Delay 10 110 10 70...

Page 160: ...Tandy 1000 WAVEFORMS BUS TIMING MINIMUM MODE SYSTEM iAPX 88 10 Technical Reference Manual CLK 8284 OU1PU1 101M SSO ROY 8284 InpUI SEE NOTE 5 I ADr ADo I DTIR TCHCTV i r I...

Page 161: ...ALT D E N FiD WR INTA VOH oriA INDETERMINATE AD _ ADo l V INVALID ADDRESS SOFTWARE HAL T 1 ALL SIGNALS SWITCH BETWEEN VOH AND VOL UNLESS OTHERWISE SPECIFIED 2 NS SM i E EB S DT3 TW TO DETERMINE IF lw...

Page 162: ...35 35 ns See Notes 1 2 TCLR1X RDY Hold Time into B2B4 0 0 ns See Notes 1 2 TRYHCH READY Setup Time into 213 TCLCL 15 2 JTCLCL 15 ns BOBB TCHRYX READY Hold Time into BOBB 30 20 ns TRYLCL READY Inactive...

Page 163: ...CLK Low to MCE High See 15 15 ns Note 1 TCHLL ALE Inactive Delay See Note 1 15 15 ns TCLMCL MCE Inactive Delay See Note 1 15 15 ns CL 20 100 pF for TCLDV Data Valid Delay 10 110 10 60 ns all 8088 Outp...

Page 164: ...A 8288 OUTPUTS SEE NOTES 5 6 I TCLCL HCr VCH r r Jr L J f J TCLAV L r TCHCl _TCLCH_ I TCHSV TClSH l I 1 18E 1 NOTE 8 A15 Ae I T X_ CIDV TCHDX A 9 A16 1 5 53 TSVLH TCllH 1 TCHll I i r J I I i TR1VCL X...

Page 165: ...TCH BETWEEN VOH AND VOL UNLESS OTHERWISE 2 ROY IS SAMPLED NEAR THE END OF T2 T Tw TO DETERMINE IF Tw MACHINES STATES ARE TO BE INSERTED J E AODRESS IS VAUO BETWEEN FIRST AND SECOND INT 4 TWO INT CYCLE...

Page 166: ...IIIENTS FOR AS t NCHFlONOUS SIGNALS ONLY TO GU A NTH AECOGNITION AT NEXT eLI i An CLIl CYClt I AnyCll Cycle_ A o E REQUEST GRANT SEQUENCE TIMING MAXIMUM MODE ONLY C L feLGH __ 1TCGHV _ TCLGl _ lClGH 0...

Page 167: ...Tandy 1000 Technical Reference Manual INTEL CORPORATION 3065 Bowers Avenue Santa Clara California 95051 Printed in U S A T 3054 40K 1281 JC JL...

Page 168: ...nge Extended Temperature Range The Intel 8253 is a programmable counter timer chip designed for use as all Intel microcomputer peripheral It uses nMOS technology with a single 5V supply and is package...

Page 169: ...by the buffer upon execution of INput or OUTput CPU instructions The Data Bus Buffer has three basic functions 1 Programming the MODES of the 8253 2 Loading the count registers 3 Reading the count va...

Page 170: ...MODE of each counter selection of binary or BCD counting and the loading of each count register The Control Word Register can only be written Into no read operation of its contents is available Counte...

Page 171: ...loaded ThEe counter continues to decrement after terminal count has been reached Rewriting a counter register dUring counting results in the following 1 Write 1st byte stops the current COunting 2 Wr...

Page 172: ...or Similar to MODE 2 except that the output will remain high until one half the count has been completed for even numbers and go low for the other half of the count This is accom plished by decrementi...

Page 173: ...e One Shot r i _J J THI jfR r L MODE 2 Rate Generator L O l Technical Reference Manual MODE 3 Square Wave Generator r 1 O C K 4 2 4 2 4 2 4 2 4 2 4 2 4 O U T P U T n 4 5 4 2 5 2 5 4 2 5 2 5 4 2 O U T...

Page 174: ...ess so that Its loading IS completely sequence independent SCO SC 1 The loading of the Count Register with the actual count value however must be done In exactly the sequence programmed in the MODE co...

Page 175: ...53 II IS absolutely necessary to complete the entlle reading procedure If two bytes are programmed to be read then two bytes must be read before any loading WR command can be se U lhe same counter 3MH...

Page 176: ...O C to 70 C Vee 5V c 10 Symbol paramete I M t t __ Test Conditions _ I v e L __ N _ f VQ _ _ P t h_ V o lta g e _ 4 t V J te2 1 I L Input Load Current _ __t _ IN Vee to OV IOFL Output Float Leakage t...

Page 177: ...iod 380 de 380 de tPWH High Pulse Width 230 230 tPWl low Pulse Width 150 150 IGW Gate Width High 150 150 tGL Gate Width low 100 100 tGS Gate Set Up Time to ClK1 100 100 tGH Gate Hold Time After ClK1 5...

Page 178: ...Manual inter 825318253 5 WAVEFORMS WRITE TIMING READ TIMING 0 CS X I x wAi I IDW fWD _ t ww AO_ cs x JJ I RD DATA BUS i 1 tGH r 1 loD G GS t4 GAHG IA l ______ JX __ X _ CLOCK AND GATE TIMING LAST BYT...

Page 179: ...ectored priority interrupts without additional cirCUitry It is packaged In a 28 pln DIP uses NMOS technology and requITes a single 5V supply Circuitry is static requITing no clock input The 8259A IS d...

Page 180: ...8259A and inputs for a slave 8259A Sieve Progrem Eneble Bulfer ThiS IS a dual funclion pin When In the Buffered Mode It can be used as an output to control buffer transceivers EN When not in the buffe...

Page 181: ...ore tasks could be assumed by the microcompufer to further enhance its cost effectiveness The Programmable Interrupt Controller PIC functions as an overall manager in an Interrupt Driven system enviro...

Page 182: ...his data depends on the system mode PM of the 8259A DATA BUS BUFFER This 3 state bidirectional 8 bit buffer is used to inter lace the 8259A to the system Data Bus Control words and status information...

Page 183: ...n code 110011011 onto the 8 blt Data Bus rough ItS 07 0 pins 5 This CALL instruction will Initiate two more INTA pulses to be sent to the 8259A from the CPU group 6 These two INTA pulses allow the 825...

Page 184: ...t is resel which means that fol lOWing initialization an interrupt request IA Input must make a low to hlgh transition to generate an Interrupt b The Interrupt Mask Register is cleared c IR7 Input IS...

Page 185: ...SNGL 1 no ICW3 will be issued IC4 this bit is set ICW4 has to be read ICW4 Is not needed set IC4 O INITIALIZATION COMMAND WORD 3 ICW3 This word is read only when there is more than one 8259A in the sy...

Page 186: ...l OJ OJ J l J I i I j Is s Is Is I I lu J 1 1 LJ 1 S S V1 I o 0 lJ i III 1 1 0 Do I I0 Ir L l n I i n I I I II iijJ c n I I O I I L_ _ l 0 0 0 0 1 I 1 1 111 4 NOTE 1 SLAVE 10 IS EQUAL TO THE CORRESPON...

Page 187: ...sk Register IMR M 7 Mo represent the eight mask bits M indicates the channel is masked inhibited M 0 indicates the channel is enabled OPERATION CONTROL WORD 2 OCW2 R SL EOI These three bits control th...

Page 188: ...TATf OtolHON Sl ECIJICEOICOl l ND AOTATfINAUTOIIATICEOlllOOlElKT AOUTEIH UTOM YICEDIMOOE ClLARJ AOTATIEONSl ECU ICEQICOIIIIIANO SE TPl t ORlrvCOM NO I lm I I o 0 1 REA O READ flDPUl5E ROPULSE Sf EC lM...

Page 189: ...can change prrorrtles by programmmg the bottom priorrty and thus fixmg all other prrorrtles i e If IA5 is programmed as the bottom prrorrty deVice then IA6 will have the highest one The Set Pflority...

Page 190: ...set by OCW3 where SSMM 1 SMM 1 and cleared where SSMM 1 SMM O LT IT O EDGE l lE El I IOGI I LS I In this mode the INT output is not used or the micropro cessor internal Interrupt Enable flip flop is...

Page 191: ...ogrammed using bit 3 in ICW1 If LTIM 0 an interrupt request will be recognized by a low to high transition on an IR input The IR input can re main high without generating another interrupt If LTIM 1 a...

Page 192: ...EOI should be sent BUFFERED MODE When the 8259A is used in a large system where bus driving buffers are required on the data bus and the cas cading mode is used there exists the problem of enabl ing...

Page 193: ...t Load Current 10 10 IiA OV VIN Vee ILOL ourput Leakage Current 10 10 IiA 0 45V VOUT Vee ICC Vee Supply Current 85 mA IR Input Load Current 300 IiA VIN 0 ILiR 10 IiA VIN Vee Note For Extended Temperat...

Page 194: ...SPONSES Symbol Perameter 8259A 8 8259A 8259A 2 Units reet Conditione Min x TRLDV Dala Valid from RDilNTA 300 TRHDZ Dala Floal alter RD INTAI 10 200 TJHIH Interrupt Output Delay 400 TIALCV Cascade Vali...

Page 195: ...Tandy 1000 Technical Reference Manual 8259AJ8259A 2 8259A 8 WAVEFORMS Continued READ INTA T LEL TA L f T L fI Ao J AOD ES lUI IlIlNTA _ T LOV 1 1 TAHOV _u i DATAIUI J OTHER TIMING 2 136...

Page 196: ...e Manual INTA SEQUENCE I r TJH H Lj 4 C _I TJUH 1 i _ J1 r y J_ lMT Il ____ _ I I I k J C IC 10 I cvDV I A NOTES Interrupt output must remain HIGH at least until leading edge of first INTA 1 Cycle 1 1...

Page 197: ...Tandy 1000 Technical Reference Manual...

Page 198: ...ovides Local READY and MultibusTM READY Synchronization 18 Pin Package Single 5V Power Supply Generates System Reset Output from Schmitt Trigger Input Capable of Clock Synchronization with Other 8284A...

Page 199: ...erves to qualify its respective Bus Ready Signal RDYl or RDY2 AENl validates RDYl while AEN2 validates RDY2 Two AEN signal inputs are useful in system configurations which permit the processor to acce...

Page 200: ...A8 j signals validate their respective RDY signals If a Multi Master system is not being used the Am pin should be tied lOW Synchronization is required for all asynchronous active going edges of eith...

Page 201: ...VA 5 25V Vc Input Forward Clamp Voltage 1 0 V Ic 5mA Icc Power Supply Current 162 mA V L Input lOW Voltage 0 8 V V H Input HIGH Voltage 2 0 V V HA Reset Input HIGH Voltage 2 6 V VOL Output lOW Voltage...

Page 202: ...40 ns tCLPH ClK to PClK HIGH DELAY 22 ns tCLPL ClK to PClK lOW Delay 22 ns tOLCH OSC to ClK HIGH Delay 5 5 22 ns tOLCL OSC to ClK lOW Delay 2 2 35 ns tOLOH Output Rise Time except ClK 20 ns From O BV...

Page 203: ...RESET SIGNALS Technical Reference Manual 8284AI8284A 1 NAIIE EFI OSC CSYNC RESET 0 IClIl _ _ Ir NOTE All TIMINel MEASUREMENTS ARE MADE AT 1 5 VOLTS UNLESS OTHERWISE NOTIIO READY SIGNALS FOR ASYNCHRON...

Page 204: ...Manual 8284A 8284A 1 WAVEFORMS Continued READY SIGNALS FOR SYNCHRONOUS DEVICES elK ADY1 2 READY 24MHzD R r 1 tX1 ClK 1 1 X2 FIC CSYNC Clock High and Low Time Using X1 X2 FIC CSYNC Clock High and Low...

Page 205: ...inter 8284A 8284A 1 Technical Reference Manual Vcc i Xl 24MHzO I I X2 NOTU 1 CL 100pF 2 CL 30pF RDY2 asc FIe AEN2 CSYNC Ready to Clock Using X1 X2 Fie AEm t RDY2 Jilla CSYNC READY Ready to Clock Using...

Page 206: ...lowing external devices to directly transfer information from the system memory Memory to memory transfer capability is also provided The 8237A offers a wide variety of pro grammable control features...

Page 207: ...o I the data bus to be strooeo Into an external latch by ADSTB In memo 2 89 Symbol lOR lOW EOP AO A3 Type H nd Function ory to memory operations data from the memory comes Into the 8237A on the data b...

Page 208: ...nd Control block decodes the various com mands given to the 8237A by the microprocessor prior to servicing a DMA Request It also decodes the Mode Control word used to select the type of DMA during the...

Page 209: ...6 system this will ensure one full machine cycle execution between DMA transfers Details of timing between the 8237A and other bus control protocols will depend upon the char acteristics of the microp...

Page 210: ...to the latch Address Enable AEN is used to enable the bits onto the address bus through a three state enable The lower order address bits are output by the 8237A directly Lines AO A7 should be connect...

Page 211: ...ith their corresponding current register in B bit bytes in the P fogram Condition by the microprocessor These registers cannot be read by the microprocessor current Address Register Each channel has a...

Page 212: ...al EOP Is applied These bits are cleared upon Reset and on each Status Read Bits 4 7 are set whenever their corresponding channel is requesting service 1 5 4 3 2 I 0 _ _ BII Number IE Channel OMs reac...

Page 213: ...Reed 0 0 1 0 1 1 0 0 AO Al 0 0 1 0 1 1 0 1 A8 A15 Base and Current Word Count Write 0 1 0 0 1 1 1 0 WO W1 0 1 0 0 1 1 1 1 W8 W15 Current Word Count Reed 0 0 1 0 1 1 1 0 WY Wl 0 0 1 0 1 1 1 W8 W15 Fig...

Page 214: ...the least signifi cant 8 bits on the eight address outputs and the most significant 8 bits on the data bus The contents of the data bus are then latched into the 8282 8 bit latch to complete the full...

Page 215: ...noted 3 Output loading is 1 TIL gale plus 150pF capacitance unless otherwise noted 4 The net iOW or MEMW Pulse width for normal write will be TCY l 00 ns and lor extended write will be 2TCY 1 00 ns T...

Page 216: ...ns TCL Clock LOW Time Transitions 10 ns 150 110 I 68 ns TCY CLK Cycle Time 320 I 250 200 ns TDCL CLK HIGH to READ orWRITE LOW Delay Note 4 270 200 190 ns I TDCTR READ HIGH from CLK HIGH 54 Delay Time...

Page 217: ...Nole 3 200 200 140 ns TRDF DB Float Delay from READ HIGH 20 100 20 100 0 70 ns TRSTD Power Supply HIGH to RESET LOW Selup Time 500 500 500 ns TRSTS RESET 10 First IOWR 2TCY 2TCY 2TCY ns TRSTW RESET Pu...

Page 218: ...___ il__ l _ I I I Xl II i AnN I I 1 ri H 1 i I r r J1 i f__f 1 _ H j l 7t II DI f rlt f iH i I ir I f1I L D I t H _ 1 1 rFMB r I I I I rt1tTAHW H X AOO lUVAlID r UH 1 TDCTlII _ f T vC TFACf lOCH ilii...

Page 219: ...1 _r T_A_SM I I T HS TAFAB J r l 1 AD_D_RE_SS_V_AL_ DI _ _ I I If AO A7 A DSTB I I i I TFACI 1 r TOCL TDDvl j TDDH MEMR II_ I lr TAFC TDCTW r TFACH TDCL I 1 I 1 t IV 0 11 r I bm zzzzzmo Figure 12 Memo...

Page 220: ...SFER TIMING 8237A 8237 4 8237 5 Technical Reference Manual READV _ I _T r RS i INT I _ ITAK fOP j V TEPS 1 EXT r T EPW 1 fOP Figure 14 Compressed Transfer RESET TIMING Vee J11 ___________ T R ST W RES...

Page 221: ...ble I O device designed for use with Intel microprocessors It has 24 I O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation In the first mode MODE 0 eac...

Page 222: ...Address and Con trol busses and in turn issues commands to both of the Control Groups CS Chip Select A low on this input pin enables the com muniction between the 8255A and the CPU Read A low on this...

Page 223: ...Register can be wrillen into No Read operation of the Control Word Register is allowed Ports A B and C The 8255A contains three B bit ports A B and C All can be configured In a wide variety of functio...

Page 224: ...B definitions All of the output registers in cluding the status flip flops will be reset whenever the mode is changed Modes may be combined so that their functional definition can be tailored to almo...

Page 225: ...Quest signals generated from port C can be inhibited or enabled by setting or resetting the associated INTE flip flop using the bit set reset function of port C This function allows the Programmer to...

Page 226: ...al Reference Manual 8255A18255A 5 MODE 0 Configurations CONTROL WORD 0 0 06 05 04 OJ D 2 0 1 Do 82S5A CONTROL WORD 1 fit I JI ID IJ 8255 cr K PC I f pcJ PCo CONTROL WOAD 3 D7 D6 DS D DJ D2 0 Do 8255 C...

Page 227: ...4 cj PC PC I PCJ pco 1 0 8255 8255A Pel pc PB1 PBO CONTROL WORD lt15 0 06 Os D OJ 02 0 Do A PA7 P 8255A c pc pc 1 2 _ pel peO A PA7 PAu 1 PB PBo CONTROL WOAD 1 10 0 06 Os D OJ 02 01 Do 8255A c 4 pc pc...

Page 228: ...ansferring I O data to or from a specified port in conjunction with strobes or handshaking signals In mode 1 port A and Port B use the lines on port C to generate or accept these hand shaking signals...

Page 229: ...of the RD input INTR Interrupt Request A high on this output can be used to interrupt the CPU when an input device is requesting service INTR is set by the STB is a one IBF is a one and INTE is a one...

Page 230: ...he 8255A that the data from port A or port B has been ac cepted In essence a response from the peripheral device indicating that it has received the data output by the CPU INTR Interrupt Request A hig...

Page 231: ...Functional Definitions Used in Group A only One B bit bi directional bus Port Port AI and a 5 oit control Port Port Cl_ Both inputs and outputs are latched The 5 bit control port Port CI is used for c...

Page 232: ...U TO 8255 RD OBFA I T E t STB 2 A L _ j _ pes IBF A J pc 1 1 0 Figure 14 MODE 2 AOIJ I SIB OB f J IOIJ J ST ______ J DATA FROM PERIPHERAL TO 8255 DATA FROM 8255A TO PERIPHERAL DATA FROM 8255 TO 8010 F...

Page 233: ...D7 06 05 D4 03 D2 D Do I I t N J 0 I0 pc 1 INPUT 0 OUTPUT PC4 STBA PC 2 o I I O AD _ Wil MODE 2 AND MODE 1 OUTPUT MODE 2 AND MODE 1 INPUT pes IBFA pc INTRA PC IBFa PC2 STBe WR _ 0 _ PC INTRA PA7 PAo...

Page 234: ...tion Bits in Clower PC3 PCO can be accessed using the bit set reset function or accessed as a threesome by writing into Port C Source Current Capability on Port B and Port C Any set of output buffers...

Page 235: ...programmed by the I O service routine and becomes an extension of the system software By ex amining the I O devices interface characteristics for both data transfer and timing and matching this infor...

Page 236: ...CRC P86 TEST P8 BUSYLT _ 1 Figure 23 Basic CRT Controller Interface ERRU REQUEST I j I B ilNPUTI P8 P86 I_ _ 1 INTERRUPT REQUEST C I A 1 A A A MO 1 PA6 OUTPUT PA I C PCb 8255 LpC ____ H _ R 1 R J _ R...

Page 237: ...011A V IOH 20011A 4 0 mA REXT 75OU VEX1 1 5V 120 mA 10 I1A V N Vee to OV _ 10 I1A VOUT Vee to 45V IOF l Output Float Leakage III Input Load Current ICC Power Supply Currenl IOAR 1 Darlington Drive Cur...

Page 238: ...s tpH Per Data After T E of STB 180 100 ns tAD ACK 0 to Outputlll 300 300 ns tKD ACK 1 to Output Float 20 250 20 250 ns tWOB WR 1 to 0 BF 0111 650 650 ns tAOB ACK 0 to OBF 11 11 350 350 ns tSIB ST B 0...

Page 239: ...I l Hf Tandy 1000 WAVEFORMS MODE 0 BASIC INPUT ____x Technical Reference Manual 8255AJ8255A 5 ______ IX _ ___ Jx Jx _ IJ IJ _ _ X J MODE 0 BASIC OUTPUT I J D IJ JX J X _ CS AO e __________________ Jx...

Page 240: ...000 intel WAVEFORMS Continued MODE 1 STROBED INPUT 8255A18255A 5 Technical Reference Manual 1 l SIK I INPUT FROM J _ PERIPHFRAL MODE 1 STROBED OUTPUT J1 IAOB e J If 1 0H ACK _________x __ _ 6 185 AFN...

Page 241: ...08 _ DATA FROM 825510 PERIPHERAL DATA FROM PERIPHERAL TO 8255 s t ______ JI L PERI 8 RAl r i lPH _ I RI8 DATA FROM 8255 TO B080 NOTE Any sequence where WR occurs before ACK and STB occurs before AD i...

Page 242: ...sided recording The 8272A provides control signals which simplify the design of an external phase locked loop and write precompensation circuitry The FDC simplifies and handles most of the burdens as...

Page 243: ...bits 10 FDD t 28 29 0 FDD Drive Select Selects FDD unit f t 27 0 FDD Head Select Head 1 selected when 1 high Head 0 selected when 0 low DS DSo lvR DATA RDY FR STP f FLT TRKO 33 I FDD HDl Symbol i t t...

Page 244: ...elec tronics The track stepping rate head load time and head unload time may be programmed by the user The 8272A offers many additional features such as multiple sector transfers in both read and wri...

Page 245: ...he Main Status Register before each byte transfer to the 8272A is required in only the Command and Result Phases and NOT during the Execution Phase During the Execution Phase the Main Status Register...

Page 246: ...ble during the Result Phase and may be read only after successfully completing a command The particular command which has been executed determines how many of the Status Registers will be read The byt...

Page 247: ...OR EQUAL MT MFM SK 1 1 a 1 a 0 0 0 0 HOS OS1 OSO C H A N EaT GPL STP _ W W W W W W W W W AECil IIi RATi 0 0 1 1o and Codea o 0 0 0 OS1 OSO Head retracted to fracllO _ SENSE INTERRUPT STATUS commandf...

Page 248: ...d only alter a command has been executed and contain information relevant 10 that particular command f During a Scan operation if STP 1 the data In contiguous sectors IS compared byte by byle ilhdatas...

Page 249: ...epending upon the manner of command termina tion may perform a Multi Sector Read Operation When N is non zero then DTL has no meaning and should be set to OFFH At the completion of the Read Data Comma...

Page 250: ...e track as continuou blocks of data If the FDC finds an error in the ID or DATA CRC check bytes It continues to read data from the track The FDC compares the 10 information read from each sector with...

Page 251: ...roller during the scan operation will cause the FDC to complete the com parison of the particular byte which is in process and then to terminate the command Table 10 shows the status of bits SH and SN...

Page 252: ...esult Phase Therefore it is mandatory to use the Sense Inter rupt Status Command after these commands to effec tively terminate them and to provide verification of the head position PCN Table 11 Seek...

Page 253: ...1 I Ir the FOC cannot detect the Data Address Mark or Deleted Data I I tdld ss rt I i a S O I l_ _ Add ess Mark In Dala F eld of I i 0 ro o I I Mark SCAN Command II the FOC I encounters a Sector whic...

Page 254: ...OL VOH _ _ lee f j Input Low Voltage 0 5 0 8 V f f Input High Voltage 2 0 Vee 0 5 V f f __4_ _____J OlJ P O ge __I f _0 _4_5 __ I __ V __ _I OL _2 _0_m_A __ 1 Output High Voltage 2 4 Vee V 10H 400 I A...

Page 255: ...tup to LeTIDIR Note 6 RW SEEK Hold from LCT DIR 30 Note 6 lOST LCTIDIR Selup 10 FR STEP Note 6 STO LCTIDIR Hold from FR STEP 24 Note 6 STU DS21 Hold from FR Step_ Nole 6 tSTP STEP Actlye Time High Not...

Page 256: ...TESTING LOAD CIRCUIT x un x A C T STING INPUTS ARE DRIVEN AT 2 4V FOR A LOGIC 1 AND 0 45V FOR A LOGIC 0 TIMING MEASUREMENTS ARE MADE AT 2 CV FOR A LOGIC 1 AND 0 8V FOR A LOGIC 0 WAVEFORMS PROCESSOR R...

Page 257: ...Tandy 1000 inter WAVEFORMS Continued PROCESSOR WRITE OPERATION 8272A Technical Reference Manual I lww I DMA OPERATION IROp w J WROfRO _ _ t I l O t R f R 6 239 AFN 01259C...

Page 258: ...Tandy 1000 inter WAVEFORMS Continued CLOCK TIMING 8272A Technical Reference Manual FDD WRITE OPERATION PRESHIFTO 9 c T 3 6 240...

Page 259: ...Tandy 1000 Technical Reference Manual WAVEFORMS Continued SEEK OPERATION 8272A ___ t IJ J 1 FLT RESET AULT RESET AIL UNSA E RESET t __ L 2 INDEX I I 1 _1 _1 6 241...

Page 260: ...Tandy 1000 inter WAVEFORMS Continued FDD READ OPERATION 8272A Technical Reference Manual TERMINAL COUNT TC I 6 242 RESET RESET I AFN 01259C...

Page 261: ...Tandy 1000 Technical Reference Manual...

Page 262: ...4 is a dala bus based input oulpul peripheral device lhal interfaces lhe microprocessor lhrough eighl dala lines and lhree control lines The SN76494 is idenlicall0 the SN76496 excepl that lhe maximum...

Page 263: ...O C to 70 C Storage temperature range 5 C to 150 C Lead temperature 1 6 mm 1 16 inch from case for 10 seconds 260 C recommended operating conditions SN76494 SN76496 UNIT MIN NOM MAX MIN NOM MAX Vee S...

Page 264: ...er inputs 10 70 pA VIB Input bias yoltage audio R 4 7 kO pin 9 to Vee 0 5 0 7 0 9 V VOH High level output voltage except pin 4 5 5 V VOL Low level output voltage 0 25 0 4 V Ice SupplV current 30 50 mA...

Page 265: ...f a frequency synthesis section and an attenuation section The frequency synthesis section requires 1Q bits of information FO F9 to define half the period of the desired frequency f is the most signif...

Page 266: ...ional amplifier summing circuit It sumS the three tone generator outputs the noise generator output and any audio input through pin 9 The output buffer will generate up to 10 mAo To prevent oscillatio...

Page 267: ...NE NOISE GENERATOR TYPICAL APPLICATION DATA 17kO SN76494 SEE NOTE 3 C C2 AUDIO t 0 0 l AMPLIFIER 1 5 V TYPICAL FIGURE 3 EXTERNAL AUDIO OUTPUT INTERFACE NOTE 3 The capacitance values of C1 lind C2 Ire...

Page 268: ...eding values The register address is latched on the chip so the data will continue g ing into the same register This allows the six most significant bits to be quickly modified for frequency sweeps co...

Page 269: ...will withstand soldering temperature with no deformation and circuit performance characteristics remain stable when operated in high humidity conditions The package is intended for insertion in mount...

Page 270: ...rammable via processor data bus Can generate timing for almost any alphanumeric screen density e g 80 x 24 72 x 64 132 x 20 etc Single 5 volt supply TTL 6800 compatible I O Hardware scroll paging or b...

Page 271: ...are possible for solving contentions for the Refresh Memory 1 Processor always gets priority 2 Processor gets priority access anytime but can be synchronized by an interrupt to perform accesses only d...

Page 272: ...MHz Rise and Fall Time for Clock Input ter tcf 20 Memory Address Delav Time MAO 160 Raster Address Delay Time RAO 160 Display Timing Delay Time OTO 300 Horizontal Sync Delay Time HSO 300 Vertical Syn...

Page 273: ...Tandy 1000 MC6845 MAO MA13 RAO RA4 Technical Reference Manual FIGURE 3 CRTC TIMING CHART t 1 f c _o l LPSTB MOTOROI A SenJlconductor Product Inc...

Page 274: ...ESH MEMORY ADDRESS elk MAO MA13 0 8 V LPD2 f o I When the CATe detects the rising edge of LPSTB in this periOd the CATe sets the Refresh Memory Address M 2 into the LIGHT PEN REGISTER tLPD1 tLPD2 Peri...

Page 275: ...Cii Data BUs Enable AS CS Data Bus Technical Reference Manual FIGURE 5 BUS TIMING CHART Sa Bus Read Timing Read Information From CRlC cvcE O 5b Bus Write Timing Write Information Into CRTC MOTOROLA S...

Page 276: ...4 DISPEN HYSNC VSYNC and CURSOR A 11 kf for OO D7 24 kn for All Other Outputs FIGURE 7 PIN ASSIGNMENT RAO RA Row Addresses AA2 for Character Generators RA3 AA4 Refresh Memory Addresses MA12 DisplaY En...

Page 277: ...tible output is an active high signal which indicates the CRTC is providing addressing in the active 0 isplay Area REFRESH MEMORY CHARACTER GENERATOR ADDRESSING The CRTC provides Memory Addresses MAQ...

Page 278: ...gisters is the top character position displayed Vertical registers are programmed in character row times or scan line times Vertical Total Register R4 and Vertical Total Adjust Register R51 The vertic...

Page 279: ...tions thus facilitating hardware paging and scrolling through memory without loss of the cursor s original position Technical Reference Manual INTERLACE NON INTERLACE DISPLAY MODES An illustration of...

Page 280: ...Tandy 1000 Technical Reference Manual FIGURE 8 CRTC FUNCTIONAL BLOCK DIAGRAM Vee Gnd MOTOROLA Semiconductor Product Inc...

Page 281: ...of a frequency and position determined by the registers The Vertical Control logic has other functions 1 Generate row selects RAO RA4 from the Raster Count for the corresponding interlace or non inte...

Page 282: ...sor End Adr 9 o H t t 1 H 2 H 3 H 4 H 5 H 6 H 1 H 8 H 1 11 H t t Cursor Start Adr 9 Cursor End Adr 10 o 6 Hf 1 8 Hf 9 Hf 10 Hf 11 Hf Cursor Start Adr 1 Cursor End Adr 0 5 FIGURE 11 INTERFACE CONTROL I...

Page 283: ...Period T c 527 loiS Scan Line Period T sl Nht 1 x T c 102 x 527 loiS 53 76 loiS Character Row Period T cr Nsl x T sl 12 53 76jJs 645 12 IJS aThese are typical values for the Motorola M3000 Monitor val...

Page 284: ...the relation between Refresh Memory Address MAO MA13 Raster Address RAO RA4 and the position on the screen In this example the start address is assumed to be 0 TABLE 4 Values Programmed Into CATe Regi...

Page 285: ...Tandy 1000 MC6845 II Z 0 Technical Reference Manual L MOTOROLA Sen llconductor Product Inc...

Page 286: ...Tandy 1000 MC6845 Technical Reference Manual...

Page 287: ...Tandy 1000 MC6845 Technical Reference Manual z r t z z N z M z MOTOROLA Semiconductor Product Inc...

Page 288: ...z X X X X N N M M z z x x z z z z z z z z g z z z __ z l l z z z z _ N N i I z I _ _ N N z z z z O iii 0 Z Z 0 0 O O c J s r Z Z Z Z x x 0 0 0 0 c c Z Z 6 z Z o l O l 0 z z z z ___ Z t z z z z z z z...

Page 289: ...Tandy 1000 Technical Reference Manual...

Page 290: ...Tandy 1000 Technical Reference Manual TEAC FD 54 MINI FLEXIBLE DISK DRIVE MAINTENANCE MANUAL i...

Page 291: ...AND FUNCI ION 301 3 1 1 General Block Diagram 301 3 1 2 Mechanical Section 302 3 2 CIRCUIT DESCRIPTIONS 307 3 2 1 Read write Circuit 307 3 2 2 Control Circuit 315 3 2 3 Servo Circuit 320 3 3 FUNCTION...

Page 292: ...2 4 2 4 4 Level disk calibration 4024 4 2 4 5 Alignment disk calibration 4026 4 2 4 6 Humidity setting 4029 4 2 4 7 Setting of SKA gain 4029 4 2 5 Others 4030 4 3 PREVENTIVE MAINTENANCE 4033 4 3 1 Cle...

Page 293: ...090 4 5 1 Replacement of Head Carriage Ass y 4090 4 5 2 Replacement of Stepping Motor Ass y 4097 4 5 3 Replacement of DD motor ASs y Spindle Motor 4100 4 5 4 Replacement of Collet Ass y 4102 4 5 5 Rep...

Page 294: ...Page SECTION 5 DRAWINGS PARTS LIST 500 5 1 CONFIGURATION 501 5 2 MECHANICAL BREAK DOWN AND PARTS LIST 506 5 2 1 FDD 506 5 2 2 Screw Washer 510 5 3 PCBA PARTS LIST 511 5 3 1 PCBA MFD Control Cl 511 5 4...

Page 295: ...Tandy 1000 Technical Reference Manual...

Page 296: ...Tandy 1000 Technical Reference Manual SEcrION 3 THEORY OF OPERATION 300...

Page 297: ...Tandy 1000 Technical Reference Manual...

Page 298: ...Technical Reference Manual Read write circuit READ DATA SIDE ONE SELECT WRITE DATA DRIVE SELECT 0 3 WRITE GATE MOTOR ON STEP DIRECI ION SELECI IN USE TRACK 00 INDEX READY WRITE PROTECI l2V SV OV Cont...

Page 299: ...Frame chassis The main structure for mounting the various mechanisms and printed circuit boards The frame is made of sheet metal to maintain the stability of the FDD in strength precision durability...

Page 300: ...k at the correct angle 4 Magnetic head and carriage Read write core Read write core Erase cores Read write gap Tunnel erase type head Straddle erase type head Fig 302 External view of magnetic head co...

Page 301: ...ge on which the head is mounted form the most important part of the FDD and is specially assembled with high precision 5 Head seek mechanism The head seek mechanism consists mainly of stepper motor wi...

Page 302: ...00 stopper which is ataached to the rear side of the head carriage Inside tracks from the track 00 on the disk are used Even if an erroneous step out command is input from the track 00 position the co...

Page 303: ...rence Manual located at the index window area of the disk jacket The LED is mounted on the PCBA DO motor servo and the photo transistor on the front OPT Ass y The index hole will be detected along the...

Page 304: ...rol circuit and servo circuit Read write circuit and control circuit are mounted on the PCBA MFD control and servo circuit is on the PCBA DO motor servo 3 2 1 Read Write Circuit The read write circuit...

Page 305: ...ver Ul Ul H t l l l t l Ul l l Q I I I I I I G 1 9 J t l rT CD I l III rT CD TP2 Differentiation amp t l t l III til 1 I l III t 1 EO t l r WD Low pass filter TP7 I I AI ADrlAO I I AI I I I I I I I I...

Page 306: ...3S etc The differentiation amplifier phase shifts the peak position of the reproduced waveform to the zero cross point and at the same time further amplifies the signal about 20dB with the most approp...

Page 307: ..._ 1 L J1 _ J 1_ _ l 1 L1_ _ Pre amp output TP7 Pre amp output TP8 Differentiation amp output r lr t TP9 Differentiation amp output t t 1 T f t I TPI0 SV approx SV approx Peak detector output in VI L...

Page 308: ...output in Ul 2 4us delay 5 5 Q output in Ul Data latch output in Ul Edge detector 2 output in Ul Read data RD TPS READ DATA V3 pin 9 Technical Reference Manual r __ __ Vlrtual pUl drop inl n LJlL _ l...

Page 309: ...is TRUE LOW The write power gate output is supplied to the common terminal of the head through the diode switch Table 301 shows the output voltage of the write power gate in various operations Conditi...

Page 310: ...ite head by turning on and off the two write drivers alternately When the write driver is active no read data pulse is generated by the read circuit WRITE GATE input Write gate WG UI pin 16 Erase gate...

Page 311: ...h as at power on or off The output of this sensor is supplied to almost all the functional blocks of the read write circuit and control circuit to protect the write driver and erase driver from errone...

Page 312: ...election of straps short bars determines the select condition of the drive spindle motor operating conditions and turn on condition of the front bezel indicator Refer to items 1 11 of the Specificatio...

Page 313: ...te t t Write gate e ront bezel indicator t t r Spindle motor Write erase gate Indicator gate Ready detector Pulse generator t lFile protect detector I I I I I I I L __ H l Spindle motor gate LVS Drive...

Page 314: ...r shift register phase drive selector overdrive timer etc Direction latch is a circuit to sample and hold the head seek direction designated by the DIRECTION SELECT signal at every input of the STEP p...

Page 315: ...when the head stops on an odd track The phase Band Bare magnetized only during the seek operation The output from the internal step pulse generator is also supplied to the over drive timer constructed...

Page 316: ...i FDD Internal step pulse gen output in U2 Overdrive timer output U2 pin 19 Motor driver inputs PHASE A U2 pin 21 PHASE B U2 pin 23 TP3 PHASE X U2 pin 22 PHASE 8 U pin 24 tl t2 t t2 tl Second step del...

Page 317: ...le motor is a long life DC brushless motor having 3 phase coils The coils are driven by the exclusive drive IC Energization and magnetized direction of the coils are controlled by the signal from the...

Page 318: ...sitions of the test points and variable resistors File protect sensor LED Index sensor LED Rl PCBA DD motor servo Ass y revision No A PCBA version two digits Name plate o o O r c J 00 ct90 o 8 9 ifllo...

Page 319: ...TTL level TraCk 00 Fig 312 Typical waveform of TPI Note The TRACK 00 output signal goes TRUE LOW level only when the phase A coil of the stepper motor is energized and the direction latch is set to th...

Page 320: ...in response to one STEP input pulse Therefore TP3 becomes HIGH level for a specified period when a step out command from an even track or when a step in command from an odd track is executed Refer to...

Page 321: ...f the disk rotational speed Speed is adjusted by the variable resistor Rl on the PCBA DD motor servo b Confirmation and adjustment of the index burst timing Burst timing is adjusted by the index senso...

Page 322: ...observe the read data pulse The signal level at this TP is opposite to that of the READ DATA output signal TPS Read data 2F interval 4 3F interval lF interval Pulse wi Fig 3l7 Typical waveform of TP5...

Page 323: ...h write operation cannot be done is installed TP6 File protect sensor Notch ope TTL level Notch masked Fig 3l8 Typical waveform of TP6 7 TP7 TP8 Pre amplifier Test point to observe the read pre amplif...

Page 324: ...outputs of the order of several hundred mVp p to several Vp p which differ in phase by 180 Both outputs are observed at TP9 and TPIO respectively For an accurate observation of the waveforms us two ch...

Page 325: ...nce Manual TP G is equipped respectively for two test point blocks TPI 6 and TP7 10 They are used as the ground terminals for measurement equipment Be sure to use a small size clip to obtain a probe g...

Page 326: ...l on PCBA DD motor servo Disk rotational speed adjustment Variable resistor for adjusting the rotational speed of the disk It is adjusted so that the index pulse interval at TP4 or at the INDEX output...

Page 327: ...Tandy 1000 Technical Reference Manual obtain the minimum asymmetry for both sides 2 TP5 Read datal fl n no _ LASymmetry 0 IF interval 1 f Trigger 2 1AS rr 3 n __ Fig 32l1 Read data asymmetry 330...

Page 328: ...Tandy 1000 SEcrION 4 MAINTENANCE 4000 Technical Reference Manual...

Page 329: ...Tandy 1000 Technical Reference Manual...

Page 330: ...recommended since it is effective to improve the reliability of the data If some of the parts in the FDD are operated at a specially heavy duty condition or if the FDD is operated over 5 years it is r...

Page 331: ...te 5 minutes 4 4 1 2 Adjustment of front lever position 5 minutes 4 4 2 3 Check and adjustment of disk pad 5 minutes 4 4 3 lever bail double sidp d only 4 Check of file protect sensor 5 minutes 4 4 4...

Page 332: ...of PCBA MFD control C vary depending on some factors such as signal interface condition be sure to confirm the version by checking the name plate on the actual printed circuit board 2 The head carriag...

Page 333: ...andy 1000 Technical Reference Manual 6 The required time for replacement includes the time for basic check and adjustment after the replacement 7 Order the maintenance parts using the parts number 400...

Page 334: ...motor Ass y DD motor ASs y C 14733780 00 20 000 motor on hrs 20 min 4 5 3 Spindle motor Collet ASs y C 17966923 00 3xlO S clamsp 15 min 4 5 4 PCBA TOO sensor 15532004 00 10 min 4 5 5 rCBA MFD control...

Page 335: ...ing 4 5 2 motor Ass y DD motor Ass y C 14733780 00 20 000 motor on hrs 20 min 4 5 3 Spindle motor Collet ASs y C 17966923 00 3xlO S clamps 15 min 4 5 4 PCBA TOO sensor 15532004 00 10 min 4 5 5 PCBA MF...

Page 336: ...e SKA i SKA FDD interface cable 00 type ii Check cable _1 for observation of control signals iii Check cable _2 for observation of read amp output signals iv SKA FDD power cable b Oscilloscope two cha...

Page 337: ...air of tweezers e Round nose pliers fl Cutting pliers g Solder and soldering iron h Hexagon screwdriver M3 3 Special jigs a MAX media jig Jig D PIN 17890746 01 4 Disks a Work disk commercially availab...

Page 338: ...Manual a Absolute alcohol Ethanol b Cotton swab or gauze c Locking paint 3 Bond l40lB d Binding agent Sumitomo Chemical Cyano bond SF Red e Screws and washers Refer to item 5 2 2 f Lubricant Kantoh K...

Page 339: ...M3 set screws for adjustment and parts replacement the following procedure should be followed 1 For adjustment remove out the set screw and also remove the locking paint which had applied to the screw...

Page 340: ...The following connectors are used for the FDD a Jl Interface connector b J2 Power connector c J4 Track 00 connector d J5 Front OPT connector e J6 Stepping motor connector f J7 Spindle motor DO motor A...

Page 341: ...e connectors J4 JS J6 J7 a Disconnection of the connector As shown in Fig 402 carefully push down the edges of the protruding area of the connector little by little with the finger nails or with a scr...

Page 342: ...hat the stopper is lifted as in Fig 403 and it inhibits accidental removal iii No tarnish or contamination should be on the contact area of the pin or the PCB side post pin If there is remove it Conta...

Page 343: ...g key position of the housing correspond with the lack of the post pin and push the housing carefully with the fingers c Removal of the pin Lifting up the stopper of the housing with a narrow object s...

Page 344: ...s according to item 3 d i through iii When you insert the pin it should be so inserted that the projection side faces the stopper of the housing After the insertion pull the cable with a pair of tweez...

Page 345: ...tail end of the steel belt 2 Thread the head cable through the hole of the disk guide and arrange it under the chassis to hold with a cord clamper There should be no excessive looseness of the cable b...

Page 346: ...rn Head Disk guide cable clamper Technical Reference Manual clamper c1amper installation screw Note The figure uses the double sided FDD The same cable arrangement is applied to the single sided FDD F...

Page 347: ...n the DC power off and connect the power cable to the PSA SKA PWR connector of the SKA 3 Set the FD PWR switch of the SKA to the OFF position 4 Connect the FD PWR OUTPUT of the SKA and the FDD with th...

Page 348: ...r cable Check cable 112 Fig 407 Connection of SKA cable PSA t Cable connection side n 7P Check cable til 1 4 FDD TPs TP1 S SP m ill SKA terminals 1 5 __Jl Shield m 4 11 Shield FDD TPs SKA terminals CO...

Page 349: ...KA to the PSA side 9 Key in tiCS 5V VOLTAGE 10 Adjust the DC power voltage so that the DATA indicator of the SKA l I V indicates the value within the range of 5 00 0 IV 11 Key in tlFtI STOP 12 Key in...

Page 350: ...turned off or until the RESET switch of the SKA is depressed Since the FD PWR switch is independent of this setting it is convenient to maintain the main DC power on for the successive operations 1 Ke...

Page 351: ...of the SKA is depressed 1 Key in DB SET STEP RATE 2 Step rate set at that time is indicated by O lmsec scale on the DATA indicator 0I1J ms e g DATA indicator indicates 6 Omsec 3 Key in a new step rat...

Page 352: ...Tandy 1000 Technical Reference Manual 7 Depress F key STOP Setting of the settling time completes e g STEP RATE 6msec SETTLING TIME lSmsec 4023 DB 30 F 150 F...

Page 353: ...f thE SKA the initial setting of the following is not required 1 Innermost track read level a Key in DO CALIBRATION READ LEVEL b Calibration value set at that time is indicated in the latter three dig...

Page 354: ...Tandy 1000 dl Key in F STOP Technical Reference Manual Note If there is no calibration change in item bl omit item cl and depress F key e g READ LEVEL 103 RESOLUTION 96 DO 103 F Dl 96 F 4025...

Page 355: ...e 0 of the SKA the initial setting of the following is not required 1 SIDE 0 alignment a Key in EO CALIBRATION SIDE 0 ALIGNMENT b The calibration value set at the time is indicated in the latter two d...

Page 356: ...he value is negative Fig 409 Calibration of alignment lobe pattern 3 Index burst timing a Key in E5 CALIBRATION INDEX TIMING b The calibration value set at that time is indicated in the latter three d...

Page 357: ...DEX output signal Index burst TP7 8 Index burst timing Notes 1 The index timing is calibrated in the SKA according to the following expression Calibrated timing t calibration value s 2 If the calculat...

Page 358: ...is not required if the relative humidity is the same as the initial value 50 of the SKA 1 Key in E2 CALIBRATION RH ALIGNMENT 2 The relative humidity set at that time is indicated in the latter two di...

Page 359: ...justment When the SKA is used depress a key which number is the same as the on state short bar among DSO 3 straps of the FDD and confirm that the indicator is on before various key operations If the I...

Page 360: ...illoscope using the test points on the SKA 4 Maintenance environment Maintenance of the FDD should be done on a clean bench at room temperature and humidity It is recommended to execute the check and...

Page 361: ...dy 1000 Ie I Horizontal setting Technical Reference Manual t ver Vertical setting Fig 4ll General orientation of the FDD during maintenance 7 Work disk When you use the SKA use a soft sectored disk 40...

Page 362: ...uipment 1 Cleaning disk 2 SKA or user s system B Cleaning procedure 1 General method a Start the spindle motor and install an appropriate cleaning disk Notes 1 Do not use a damaged cleaning disk on th...

Page 363: ...vely long cleaning time is not effective but has possibility to accelerate the head wear c Remove the cleaning disk 2 SKA method a Connect the SKA referring to item 4 2 4 and set the FO PWR switch to...

Page 364: ...maintenance perfo direct cleaning as follows A Equipment 1 Absolute alcohol Ethanol 2 Cotton swab or gauze B Cleaning procedure 1 Lightly dampen a cotton swab or a gauze with alcohol 2 Lift up the pad...

Page 365: ...Tandy 1000 Magnetic head surface Head carriage Technical Reference Manual IFia 4l2 Direct cleaning of magnetic head Single sided only 4036...

Page 366: ...manually without getting out of place 3 Clamp the collet by turning the front lever 4 In this condition adjust the collet shaft plate and tighten two fixing screws with the specified torque so that th...

Page 367: ...Reference Manual 2 Shield cover fixing screws Collet shaft plate Ass y Fig 4l41 Location of collet shaft plate Collet shaft plate Ass y Gap between collet shaft and collet holder Collet Ass y Spindle...

Page 368: ...he notch side to be left 4 Turn the front lever to close position and loosen the set screw again Then push the lever against the MAX midia jig Confirm that the pin of the lever shaft goes into the slo...

Page 369: ...l Technical Reference Manual Lever fixing screw Front lever MAX media jig Jig D Fig 415 Adjustment of front lever Sectional view of front bezel Front bezel CJ Front lever Form right angle Fig 416 Fron...

Page 370: ...g 417 of the bail so that the bail and the top of the stop cam are separated with 0 2mm approx 4 In the process of inserting a disk slowly confirm that the disk jacket does not touch the side 0 nor th...

Page 371: ...e stop cam of the CSS ASs y when the disk jacket is depressed lightly with a finger from the front bezel side 9 If the item 8 is not satisfied turn the inside adjusting screw see Fig 417 of the bail s...

Page 372: ...ical Reference Manual Inside adjusting screw adjusting screw Ass y C Outside Inside adjusting screw CSS Ass y C Bail lifter Upper arm Head carriage Ass y Note The figure is viewed from the front bezel...

Page 373: ...r on the PCBA MFD control c Install the MAX media jig as in Fig 42l and set it so that the notch A area is located on the light pass from the file protect sensor d Adjust the orientation of the FDD so...

Page 374: ...Tandy 1000 Notch B position TP6 voltage 3V Min Technical Reference Manual File protect sensor Fig 42ll Check of file protect sensor 4045...

Page 375: ...et the FD PWR swiOtch to the PSA side b Execute the general method described in item l a through e WRROT indicator of the SKA turns on when drive selection is executed by key 0 DSO indicator turns on...

Page 376: ...t is required A Equipment 1 Common screwdriver small size 2 SKA or user s system 3 Frequency counter not required when the SKA is used 4 Work disk soft sectored B Check and adjustment procedure 1 Gene...

Page 377: ...rive select by key 0 DS 0 indicator turns on e Key in CO and confirm that TRACK indication becomes 00 RECALIBRATE f Key in C3 INDEX PERIOD g Confirm that the DATA indicator CIJC J ms indicates a value...

Page 378: ...the SKA is used 6 Locking paint B Adjustment procedure 1 General method a Connect an oscilloscope to TP9 or TPIO Differentiation amp on the peBA MFD control Oscilloscope range AC mode 0 2V b Start the...

Page 379: ...the groove on the upper side of the head pad by 30 steps approx with a common screwdriver see Fig 420 At each turning of the groove execute write and read operations in item d Be sure to take apart t...

Page 380: ...Replace the work disk with a new one Q Inferior head Replace the head carriage ASs y according to item 4 5 1 iv Remove the work disk and apply a drop of locking paint around the rotating area of the...

Page 381: ...he bailor the CSS Ass y in item 4 4 3 the flexture on which the head piece is located may be deformed Remove the disk Then open and close the front lever slowly to observe the gap between the side 0 a...

Page 382: ...s the average read level of TP7 and TPB Pre amp after each cycle of operation one rotation of write and one rotation of read is finished g Observe the DATA indicator JJ JJ mV with a slight depression...

Page 383: ...RECALIBRATE and execute items e through i in the similar way k Head touch adjustment for a single sided FDD Refer to item j of General method L possible causes for the inferior head touch in a double...

Page 384: ...e motor and install a work disk c Set the head to the innermost track d Execute IF write operation 125KHz of WRITE DATA frequency e Measure the asymmetry referring to Fig 421 Note Oscilloscope should...

Page 385: ...IF write and IF read operations alternately ii For a double sided FOO repeat the operation in item i for the side 0 and the side I heads alternately The variable resistor shall be so adjusted that bo...

Page 386: ...from the FDD Then measure the asymmetry and adjust again ii Inferior disk Replace the work disk iii Inferior head Replace the head carriage Ass y according to item 4 5 1 iv Inferior PCBA MFD control...

Page 387: ...e SKA Oscilloscope range DC mode 2V 0 2 sec d Start the spindle motor by key 5 OON indicator turns on e Install a work disk f Execute drive select by key 0 DSO indicator turns on g Key in CO and confi...

Page 388: ...only for the PCBA versions or the PCBA revision numbers with the variable resistor R5 on the PCBA MFO control No adjustment can be done without R5 i Adjust the variable resistor R5 so that the asymme...

Page 389: ...d 2 to the above range Set either of the channels to Invert mode and ADD both channels b Start the spindle motor and install a level disk c Make the head move to the innermost track d Execute 2F write...

Page 390: ...g or h is out of the specified range following causes are assumed i Inferior disk Disk and or jacket is deformed or damaged Replace the level disk with a new one ii Abnormal disk rotational speed Chec...

Page 391: ...E READ LEVEL DIF 2F Calibration value of the level disk should be set previously in the SKA h Confirm that the DATA indicator CIJ lJ mVo p indicates the value within the following range Innermost trac...

Page 392: ...ither of the channels to Invert mode and ADD both channels b Start the spindle motor and install a level disk c Make the head move to the innermost track d Execute IF write operation for one rotation...

Page 393: ...value in item i or j is out of the specified range following causes are assumed i Inferior disk Disk and or jacket is deformed or damaged Replace the level disk with a new one ii Inferior disk rotati...

Page 394: ...in 08 RESOLUTION The calibration value of the level disk should be set previously in the SKA h Confirm that the DATA indicator I I indicates the value within the following range Innermost track resolu...

Page 395: ...temperature or extreemly high or low humidity should be avoided Check and adjustment should be done after two hours Hin of storing in the above mentioned condition It is recommended that the orientat...

Page 396: ...pped is required to make the alignment track position be fit with the magnetized condition of the basic magnetized phase A of the stepping motor I f the stepped track numbers are inassured set it agai...

Page 397: ...versely measure VA and VB when the head is on the alignment check track by stepping out after one or several step ins h Calculate the true value of misalignment as described in item f i Confirm that b...

Page 398: ...e humidity CD Calibration value Relative humidity 50 x K 0 When the left side lobe pattern level VA is assumed as I lobe pattern ratio should be so adjusted that the right side lobe pattern level VB t...

Page 399: ...ng the screws with the following specified torque to be within 20 stepping motor fixing torque 9Kg cm vi Remove the alignment disk vii Apply a drop of locking paint to the head of the stepping motor f...

Page 400: ...Tandy 1000 Technical Reference Manual stepping motor 2 Stepping motor fixing screws Common screwdriver Geared area Fig 426 Adjustment of track alignment 4071...

Page 401: ...an alignment disk f Execute drive select by key 0 050 indicator turns on g Key in CO and confirm that the TRACK indicator becomes 00 RECALIBRATE h Set the head to the alignment check track Key in C2 1...

Page 402: ...mental relative humidity should be set previously in the SKA L Confirm all the indications on the DATA l indicator are within 30 The initial digit of the DATA indicator is the symbol f mark indicates...

Page 403: ...FDD repeat the adjusting operation in item iii alternately for side 0 and side 1 heads until the both misalignment take the smallest value v Tighten the two fixing screws of the stepping motor little...

Page 404: ...i The 1st channel STEP interface signal pin No 20 or PCBA MFD control U4 pin 5 ii The 2nd channel PCBA MFD control TPI Track 00 sensor IV range iii External trigger DIRECTION SELECT interface signal p...

Page 405: ...rrectly according to item 4 4 10 iv Make the head move to the position where the lobe pattern as in Fig 425 can be observed v Remove the alignment disk vi Step out the head for 16 tracks space The hea...

Page 406: ...nal trigger J1 Step out 3 4 Technical Reference Manual Step in 3 4 SKA DOUT TPl Track 00 sensor 2lms tA tB Track 00 detectio Fig 427 Track 00 sensor waveform fixing screw Head carriage Ass y Fig 428 A...

Page 407: ...signal Interface connector pin No lB or Pin 3 of J3 resistor network RAI for terminator on the PCBA MFO control trigger c Key in BB F STEP observation d Start the spindle motor by key 5 MaN indicator...

Page 408: ...the rear side of the head carriage ii Connect the 2nd channel of the oscilloscope to TP9 or TP10 Differentiation amp of the PCBA MFD control and change the trigger to this channel Oscilloscope range...

Page 409: ...the sensor position so that the timing tA in Fig 427 falls within the following range Adjusting target of tA 3 4 4 6msec xii Repeat the adjustment so that the values in item xi fall within the specif...

Page 410: ...etween the head carriage and the extreme end of the track 00 stopper is 0 1 0 4mm See Fig 429 e Repeat step in and step out operations between track 00 and track 05 Confirm that no impact sound can be...

Page 411: ...Set the head to track 00 ii Loosen the fixing screw of the track 00 stopper See Fig 429 iii Adjust the stopper position so that the gap between the stopper and the head carriage becomes 0 25mrn appro...

Page 412: ...irm that the head carriage does not move even if 9 is keyed in head carriage rests on track 00 9 Confirm that the gap between the head carriage and the extreme end of the track 00 stopper is 0 1 0 4mm...

Page 413: ...CO and confirm that the TRACK indicator becomes 00 RECALIBRATE ii Loosen the fixing screw of the track 00 stopper See Fig 429 iii Adjust the stopper position so that the gap between the stopper and th...

Page 414: ...onnect the 1st channel to TP4 Index on the PCBA MFD control and the 2nd channel to TP7 or TPB Pre amp Apply positive trigger by TP4 Oscilloscope range The 1st channel DC mode 2V 50 sec The 2nd channel...

Page 415: ...sensor ASs y position according to the following procedure i Loosen the fixing screws see Fig 431 of the PCBA index sensor and adjust its position to make the true value of the index burst timing gall...

Page 416: ...Tandy 1000 Adjusting direction of Technical Reference Manual peBA index sensor fixing screw peBA index sensor o o Fig 431l Adjustment of index sensor 4087...

Page 417: ...nd confirm that the TRACK indication becomes 01 _ g Key in EG INDEX TIMING The calibration value of the index timing should be set previously in the SKA h Confirm that the DATA indicator JJ s indicate...

Page 418: ...the adjustment so that the DATA indication takes the median value when the fixing screw has been tightened with the specified torque iii Depress F key STOP iv Apply a drop of locking paint on the fix...

Page 419: ...rocedure Technical Reference Manual 1 Turn the front lever Fig 505 No 42 to close position and remove the fixing screw Fig SOS 511 2 Turn the front lever to open position and draw out the front lever...

Page 420: ...l belt from the hook of the band fixing plate A Fig 505 No 16 to remove the band fixing plate A from the head carriage Ass y When removing the band fixing plate A from the head carriage it will be rem...

Page 421: ...be the best 17 Apply specified lubricant to the surface of one guide shaft Then install it again to the new head carriage as it was Note When applying the lubricant to the guide shaft dip a piece of g...

Page 422: ...he stepping motor ASs y 24 After moving the head carriage several times manually tighten the steel belt fixing screw carefully with the specified torque At this time be careful that the belt is tensio...

Page 423: ...track alignment according to item 4 4 10 32 Adjust the track 00 sensor position according to item 4 4 11 33 Adjust the track 00 stopper position according to item 4 4 12 34 Check and adjust the index...

Page 424: ...Tandy 1000 Refer to item 4 2 5 1 4095 Technical Reference Manual...

Page 425: ...000 Band fixing plate A Band spring Technical Reference Manual 2 Guide shafts Head carriage Ass y Guide shaft clips Band fixing plate B Stepping motor capstan Fig 432 Replacement of head carriage Ass...

Page 426: ...e peBA MFD control Fig 505 No 35 by removing the three fixing screws Fig 50S No 37 and Sl 3 Disconnect all the connectors mounted on the PCBA MFD control and remove the PCBA 4 Holding the top of the b...

Page 427: ...y the steel belt and the band spring should be replaced with the stepping motor However if there is no inferior points for these belt and spring they may be used after cleaning the surface carefully w...

Page 428: ...readjust the belt to run straightly by the screw in item 10 After the adjustment tighten the screw carefully with the specified torque 16 Execute the continuous seek operation for five minutes When th...

Page 429: ...cable tie 4 Draw out the PCB holder Fig 505 No 38 which holds the PCBA servo of the DO motor Ass y C Fig 505 No 7 from the chassis Fig 505 No 1 5 Remove three fixing screws Fig 505 52 57 of the DO mo...

Page 430: ...the chassis made of DO motor cable TOO sensor ASs y cable and front OPT Ass y cable using a new cable tie 9 Check for the file protect sensor according to item 4 4 4 10 Check or adjust the disk rotati...

Page 431: ...the drive with eject Ass y Option remove the hooks of the eject spring A and eject spring B from the collet shaft plate Then remove the collet shaft plate Ass y 3 Pullout the collet Ass y Fig 50S No 3...

Page 432: ...Throwaway the removed tie 3 Remove the PCBA TOO sensor Fig 505 No 9 by removing the fixing screw Fig 505 510 4 Install a new PCBA TOO sensor in the reverse order of item 1 through 3 5 Loosen the fixi...

Page 433: ...A 3 Disconnect all of the connectors mounted to the PCBA MFD control and remove the PCBA 4 Install a new PCBA MFD control in the reverse order of items 2 and 3 5 Set the straps as they were on the old...

Page 434: ...Tandy 1000 Technical Reference Manual Ill It is recommended to connect the FDD to the system for overall test Refer to item 4 2 5 Ill 4105...

Page 435: ...sition and draw out the front lever Ass y 3 Remove the front bezel Ass y Fig 505 No 4l by removing two fixing screws Fig 505 55 4 Remove the shield cover Fig 505 No 44 by removing two fixing screws Fi...

Page 436: ...protect sensor according to item 4 4 4 11 Adjust the index burst timing according to item 4 4 13 12 Form the cables as they were using a new cable tie 13 Attach the shield cover in the reverse order o...

Page 437: ...s Fig 505 55 2 Lift up the pad arm manually and peel the pad carefully with a pair of tweezers See Fig 433 3 Apply a new pad to the initial position Be careful not to press the pad surface strongly 4...

Page 438: ...Tandy 1000 Fig 433 Replacement of head pad 4109 Technical Reference Manual Pad ram Head carriage Ass y Single sided...

Page 439: ...Ass y 3 Remove the fixing screws Fig 50S 55 of the front bezel Ass y Fig 505 No 41 and draw out the front bezel 4 Install a new front bezel Ass y in the reverse order of item 2 and 3 Note For the ins...

Page 440: ...50S No 42 to close position and remove a fixing screw Fig 50S Sll 2 Turn the front lever to open position and draw out the front lever Ass y 3 Install a new front lever Ass y in the reverse order Note...

Page 441: ...Tandy 1000 Technical Reference Manual...

Page 442: ...Tandy 1000 SECTION 5 DRAWINGS PARTS LIST 500 Technical Reference Manual...

Page 443: ...Tandy 1000 Technical Reference Manual...

Page 444: ...ed break downs FD 54 Chassis Upper chassis ASs y DO motor Ass y C Spindle motor Transport Stepping motor ASs y C Clamp cam Ass y C Collet Ass y C PCBA TOO sensor C Bail Ass y CSS Ass y C Double sided...

Page 445: ...fixing screw Collet Ass y upper chassis motor J6 Stepp1ng J5 Front OPT Technical Reference Manual control fixing screws Jl Signal interface card edge Frame gro nd term1na Chassis motor J7 Spindle J4...

Page 446: ...per chassis fixing screw DD motor fixing Spindle DD Technical Reference Manual Front OPT Ass y fixing screw OPT Ass y Index sensor fixing screw Ass y only Upper chassis fixing screw Fig S02 External v...

Page 447: ...Tandy 1000 Front bezel fixing screws DO motor Ass y Fig 503 External view No 3 504 Technical Reference Manual motor Ass y fixing screw motor Ass y...

Page 448: ...Tandy 1000 o Technical Reference Manual arts No of the FDD o plate No Fig 504 External view No 4 505...

Page 449: ...y C Spindle motor 1 8 16757130 00 TOO bracket 1 9 15532004 00 PCBA TOO sensor C 1 10 17966927 00 css Ass y C 1 FD 54B 11 13189135 Terminal 1 12 14733770 00 Stepping motor Ass y C 1 13 17966912 00 Head...

Page 450: ...lamp return spring 1 29 17966933 00 Collet shaft plate ASs y 1 30 17966923 00 Collet Ass y C 1 31 17966935 00 Bail Ass y A 1 FO 54A 17966936 00 Bail Ass y B FD 54B 32 16787157 00 Disk pad A 2 1 Note 3...

Page 451: ...column the parts is used only for the model 3 Disk pads are included in the ASs y No 2l and No 3l 4 Guide shafts are always used in combination with the head carriage Ass y due to make the correspondi...

Page 452: ...Tandy 1000 Technical Reference Manual t on break down Fig 505 MechanLcal sec L 509...

Page 453: ...4 16498647 Screw pan three pleces 3x5 S ZMC S5 16410306 Screw bind 3x6 S ZMC S6 16498579 Screw pan three pieces 3x6 S ZMC S7 16476308 Screw pan f1at flat washer 3x8 B BNM S8 16470004 Screw pan sems 2...

Page 454: ...13441235 TTL IC 74LS04 13428139 Transistor array M54578P 13424286 Transistor 2SC2021R 13421211 Transistor 2SA881 Q R 13411378 Diode pair MA154WA 13411406 Diode pair MA154WK 13411243 Diode lS954 134113...

Page 455: ...03152 12903178 12903177 12903375 Resistor RD lj6W 1Mn J Resistor RD l 6W 47Kn J Resistor RD 1j6W 6 8Kn J Resistor RD 1 6w 2 2Kn J Resistor RD l 4W 100Kn J Resistor RN l 4W 1 24Kn F Resistor RN lW 120n...

Page 456: ...00PF K C29 12900771 Capacitor CC 50V SL lBOPF J C18 C19 12902588 capacitor CC 50V CH 56PF J cn 12902578 Capacitor CC 50V CH 22PF J C23 12454222 Capacitor CQ 100V 2200PF G C30 12454152 Capacitor CQ 100...

Page 457: ...Short bar HSM HL IU HS DS 3 HM straps 16271169 XX Name plate Table 504 PCBA MFD control C parts list 4 4 Notes 1 Parts with an asterisk are different depending on the PCBA verslons Select either of th...

Page 458: ...hort bar HSM HL IU HS DSOV3 HM straps 16271169 XX Name plate Table 504 PCBA MFD control C parts list 4 4 Notes 1 Parts with an asterisk are different depending on the PCBA versions Select either of th...

Page 459: ...Tandy 1000 5 4 SCHEAMTIC DIAGRAMS AND PARTS LOCATION 516 Technical Reference Manual...

Page 460: ...Tandy 1000 SPARE PAGE 517 Technical Reference Manual...

Page 461: ...Tandy 1000 SPARE PAGE 518 Technical Reference Manual...

Page 462: ...arts number Technical Reference Manual Version 2 digits Issue Wloe CI13 i c 1 O CRIOI 8B U com oo otRco 05 I n UI02 RI 11104 T r I C1079 t105 J I 0 lJ106 1l101 D O U PCBA DD MOTOR SERVO Type C PARTS L...

Page 463: ...Tandy 1000 Technical Reference Manual COf lT1 OL 8 Rill 7 7 IC 5V 12V GND COY PCBA DD MOTOR SERVO Type C SCHEMATIC D GRfu 520 RIIO 1 13 rOt CIII JJ I iV CR 101 Z 2VE LI L2 C 113 5 M J v C 112 3J J iV...

Page 464: ...Tandy 1000 Version 2 digits Issue PCBA MTD CONTROL PARTS LOCATION 5 1 Technical Reference Manual...

Page 465: ...Tandy 1000 Technical Reference Manual...

Page 466: ...CT J 0 PCBA 4 SHIELD DRivE SElECT I 2 lNTROI INw START ORNE SELECT L 14 155 2006 G IVISH IofOTOR ON 6 9 COHMOIV DIIUC TION SELECT 18 7 ERASE STEP 20 SHIELD WRITE DATA 2 1 WRITE 6004 24 14 T1 AC 9 26 R...

Page 467: ...5V MC PIN 15532006 XX 02 12 V A 1 ov o2 5V l O3 84 I R5 V4W r r 2 v I TP 11 Rl1 IK 5V J I L _ _J CRA I I I I L_ _J L en T l 711l v if 90 3 OV CRAe r I I _ _ J CRA i r I 2O L _ 1 _ J 1 80 C14 I 10 1 4...

Page 468: ...R ARRAY RA VALUES ARE IN OH fS 1 8W ot erREA TEl r s en UNLESS JTHRWfSE SPECf FlED I PARTS WITH AlII ASTERISk If ARE DIFFEREAJT IN EACH PCS I ERSION REFER 7D VERSION TABLE UA LISTED PARTS ARE NOT USED...

Page 469: ...Tandy 1000 Technical Reference Manual CONNECTORS AND PIN DESIGNATIONS...

Page 470: ...Tandy 1000 Technical Reference Manual...

Page 471: ...DISK DRI EI E2 POWER SWITCH 5 E5 AC I T EARTH GROUND Connector Cable Interconnection 8000231 QUICKDISGONNECT TERMINAL FASTON DESCRIPTION DRAWING NO CA8LE ASSY N DC POWER C6 8131 810 955e __ CA IPW_R...

Page 472: ...Tandy 1000 Technical Reference Manual KEY Pos ION CD 15 1 I r 7 Cable Assembly W1 6008131 u s A J f o 7 _____ CJ I IYz J o LIS T lU IRE 01 E QUIVALENT 2 TOLERA C E t r 1 T l vJRt PS liS REQUIRED...

Page 473: ...O l PKZ 1 LIA E 18 BRN t ELJTR 4L 8 BLLJ 3 2 I I Cable Assembly W2 6008141 P TS LIST L S IHY lJ S R P T 11 MFC PAI REM lf JGS Pk2 I COAlM CiZlt z po s MOLEX 2 03 4030 2 L LWT lCT J MOLEX 08 50 0187 JI...

Page 474: ...0 00 Ol i 3 I 16 25 1 2 00 D D D PARTS LIST ITEM GTY DE SCIlIPTION MF PA T NO R MA I S CD i C ONNECTOK 4 POS R ECEPTACLE MOLEX 15 29 34 1 CABLE RIBSON 34CONOU TO 050 PITCH 2 C ONNEC TOR 34 PIN E P cAR...

Page 475: ...5t 5 CDMPee i D LE t JGT I IIJC 60 05 j C IMP ME TAL TOIL 1lAI mAIO Wlf f BErwUAJ CA LE A UO METAL Dl iSI G Keyboard Assembly W5 6008129 PI F Al l S LIST XS TY DES R I101J MFc PAn uo p 5 I CO J I B P...

Page 476: ...T M G1 t JO e MUKS I f CONNe CTOR 3 PlrJ MOLEX 2 D3 4D3l 2 2 CONT A c T MOI E l CJB 5CJ DJ87 j 3 4 FASTON ZSX 032 AMP 2 520 83 2 IZ F UI L Y IN5ULAoTe l7 4 2 FASTON RIGHT AN OLE t X C l AMP 2 1520128...

Page 477: ...t J jAJILJ C TOR YALE o o MF6 flIRTUO MD fX l Cl l CCc I D I L RK s Cable Assembly W7 2600009 2 2 PIUS FAU f M1fJ 1L 2 j9 J2 R T IJ SU2 J 5 0 Nm MR BI IJ I 7 5Z 8 OG Z L c 3 _7 5 j AL f i tulj _ _ __...

Page 478: ...anual f 2 50 l 3 PAI TS LIST ITEiM QTY De SC PT ON MF o A T tJO E MA KS CD I L W T EN 2 Q INC s TERM N L AiV1plP 350 181 2 I FASTON 2SX O z MP 2 520128 1 16HT ANGLE OR E QU ly t LEt lT I CAE L E TOL E...

Page 479: ...E LIST WIRE C OUIJE TOIZ P J tJL l FUIJCTIOIJ AWl C lllfJk P 9 SPKiWT ZI f 2 I Til SPEAt i l E I JAL GIJD Z lK Z l Ll SPE RKt Q l E IZMltJAL Cable Assembly W15 6008070 PA12TS LIST DES TY DESCEIPTICHJ...

Page 480: ...0 if 12 0 PFlQ09 1374l50 051 04 r t 1 tIR O 2 0 PRO 0 4lS74 I A03 0 oa r r 5V 11 eU K Q 2 Noa Aoa 12 0 J 9GNO II V 01 DACK3 I V VFOCDMACKW 11 46 CLFI __ 03 U12 06 SFiDY jA OgL ai 3t DACK1 1 5 4a 7 _...

Page 481: ...i E Fot i E i E FcfNc i E FcfNc N DOO i 6 DOl 6 D02 52003 102 DO 2005 0 1 02 D06 i f D07 DOO N N N N N SH D01 p Q P Q P R D02 L SH D04 D03 D05 D06 SH t sv SH D07 I AAS2 R7 u35 o U36bJ o rn bJ o bJ o...

Page 482: ...g 1 1 U3 10 I 1 J2 05 020 r O L h Mc a9 Og NC T OPF _ I I f cq U3 1 3 MC a g I c L J2 22 IORJl 21 f 2_N _ C 03 q U f 0 c_ Tc_ 3 C 3 4 OP c F D X W 18 1488 02 NC L T C5 J1 31 V Ai 04 330PF J1 30 A2 26...

Page 483: ...Tandy 1000 Technical Reference Manual TANDV i I IM DOlil R22 3 C 5 IN4 S _ c v tp 2 1 Ai ZZ At Z 24 s c I IN 2k WAS 4ZuF FER TUP Jlq73 W D 15 54 L 1 C O 8ZS0 U...

Page 484: ...R 61 C5 1 C4 1 C6 1 C7 l lJ4 K 14S64 4 71 4 71 4 71 680PF T r tvA5 v 1C XA 1 f 1 R8 tv v C vV r 00 D J1 9 00 2 18 000 1 40 U4 4 JoC1 R3 1 YA 8 O 3A1 Bl 7 00 00 1klli6 U4 JoC14584 1 1 l CJ __ 02 4 16...

Page 485: ...LD 2Q t ft OA y 1 r TESTM 1h vI Vv 2 t 1 24 INTV U22 U5B 10 08 1 1 10 03 a 07 71 U 44 OB l__1 74 L SO B 74 F 04 SH 6 CRF SH W t I I 1 I 12 74F04 NOTE THIS DWG IS CAD GENERATED DO NOT REVISE MAf IJALLY...

Page 486: ...741 109 IN4148 P i 5 3 f A c i Y6 9 ST6_ Y7 7 ST7 GIG2AG2B a 4 5 R24 OK 2l R28 2 6 33 CAS 14 10 Hftr SH4 2 3 9 5V U37 u a 1 741 109 5 74Fl09 14MCK U92 5 4 a 5V N Lt I 4LSOO R34 R32 U40 1 K OK vee Gt...

Page 487: ...0 5 0 6_ _ L 3 760 6Q 14 70 7Q Cf agK 8Gf 2 ADRM _ _ l _ j J 6 tCO BA05 g 74ALS253 AAA BA12 31C3 1Y 7 33 102CO 11 2C1 A45 BA06 2 2C2 33 I l6 3 2C3 A 8 G 2G 5 6 tCO 14 g 74ALS253 A37 31C3 33 102CO 11...

Page 488: ...Tandy 1000 Technical Reference Manual Yt lO YMJ7 SH 5 I I I I 1 i J 4K CPTICf I FEv QN V XI4 XK 7 5l 1 5 VIDEO LOGIC lOW 000226 I I _________ ISliEET OF 12...

Page 489: ...I a X Mll 2 O 40 QI 0 5 L J _ _4 __X_MllO _ _ g JG l US SH 6 g r OPAoe SH 4 VIDEO LOGIC Fl O 25A R62 7S lC76 I 47uF lC85A rOUF r I i I 641 OPH L_ FEV A ONLY BAOO CU7 O 1uF Ci0i CHARENB SH 4 CCLKIf SH...

Page 490: ...Tandy 1000 Technical Reference Manual oo 01 2 02 13 03 S 0 16 OS17 06 07 19 5V Lt n _27 U10 26 1 13 12 A12 ROM 21 A11 24 Al0 25 3 AS 7 3 A2 10 c O 1uF ROM Iowa 0 0002 6 I I ______ I 6 12...

Page 491: ...86 17 87 15 09 I INTes SH 1 T oA S SH 8 PIOCSM JOYSTKCS PRINTCSM J12 2 112 3 LPIN 112 4 I LPSW LPSET LPSTRB __ FDCes_ SH 9 IOO1 SH3 5 1005 r _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _...

Page 492: ...7 37 03 _ B B OO B o i gfi I T TI ME R C H 2 G T E l 3 U78 11 BIDAM SH 6 tf 1 74LSOB PIOCS BlOW 06 t iiN Ci D Jl 5 KBO DATA elR 11 U 4 e O _ O rU117 04 0 74LSOl Bo 3 I PCO NC g 6 l PC3 NC 12 09 PC4 NC...

Page 493: ...K CONTROLLER UB5 01 UB5 04 03 UB5 OB 09 p UB3 04 05 1 U107 7 SEPD OSK O 1 12 13 JLJ69 COI 74LS 4 FOC9216 _ 2 SEPCLK COO 5 3 UB4 111 10 UB5 F 2 o 06 as 74LSOB _ 11 74LS14 __ _ 11 74LS04 C25 BOPF I usa...

Page 494: ...4 e O brJ R72 U118 5 LMFf IK 3 V 7 R73 1 4 ClOg 5V 5V 9 1K etOBA IIUF 5V C20 8 2 ro 2 2 8 2 INCT INSTALLED rl F O 1uF 20 10 II 9 ule II 06 12 e I 5V 7 13 SH 1 6 D4 14 6 le40 leAl leA3 lC42 JOYSTICK eN...

Page 495: ...ORM BAOl BAee SH 1 SYSAST 28 RSTIf U NT PINT 6 7 2 C21 COO C123 J7 9 O 1uF O luF O 1uF G Il Technical Reference Manual CU4 2200pF PARALLEL INTEFFACE C N CTOR 34 PIN CAFIJ EDGE NC D J11 14 NC DJ11 26 N...

Page 496: ...29 J9 A30 J9 A o BO 02 J9 B02 03 J9 BO 04 J9 BO os J9 B05 os J9 B06 o7 J9 B07 oa J9 soe os J9 8OS J9 810 41 J9 9U 42 J9 B 2 J9 813 J9 B J9 B S J9 B S 7 J9 Bi7 4B J9 B a g B 90se J9 B200 J9 B2 J9 022O...

Page 497: ......

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