Quectel FG50V Hardware Design Download

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FG50V

Hardware Design

Wi-Fi&BT Module Series

Version: 1.0

Date: 2020-12-08

Status: Released

www.quectel.com

Summary of Contents for FG50V

Page 1: ...FG50V Hardware Design Wi Fi BT Module Series Version 1 0 Date 2020 12 08 Status Released www quectel com ...

Page 2: ...ce Disclaimer While Quectel has made efforts to ensure that the functions and features under development are free from errors it is possible that these functions and features could contain errors inaccuracies and omissions Unless otherwise provided by valid agreement Quectel makes no warranties of any kind implied or express with respect to the use of features and functions under development To th...

Page 3: ...l Transmitting reproducing disseminating and editing this document as well as using the content without permission are forbidden Offenders will be held liable for payment of damages All rights are reserved in the event of a patent grant or registration of a utility model or design Copyright Quectel Wireless Solutions Co Ltd 2020 All rights reserved ...

Page 4: ...V Hardware Design FG50V_Hardware_Design 3 54 About the Document Revision History Version Date Author Description 2019 11 25 Jared WANG Felix FU Creation of the document 1 0 2020 12 08 Hidy CHAI Lucas HUANG First official release ...

Page 5: ... 5 1 WLAN_EN 24 3 5 2 PCIe Interface 24 3 6 BT Interface 25 3 6 1 BT_EN 26 3 6 2 BT_WAKEUP_HOST and HOST_WAKEUP_BT 26 3 6 3 PCM Interface 27 3 6 4 UART Interface 28 3 7 Conexistence Interface 29 3 8 WLAN_SLP_CLK Interface 30 3 9 Others Interfaces 30 3 9 1 SW_CTRL 30 3 9 2 WLAN Debug Interface 31 3 9 3 BT Debug Interface 31 3 10 RF Antenna Interfaces 31 3 10 1 Operating Frequency 32 3 10 2 Referenc...

Page 6: ...40 4 5 2 Current Consumption in Normal Operation 41 4 6 RF Performances 42 4 6 1 Conducted RF Output Power 42 4 6 2 Conducted RF Receiving Sensitivity 44 4 7 Electrostatic Discharge 45 5 Mechanical Dimensions 47 5 1 Mechanical Dimensions of the Module 47 5 2 Recommended Footprint 49 5 3 Top and Bottom Views of the Module 50 6 Storage Manufacturing and Packaging 51 6 1 Storage 51 6 2 Manufacturing ...

Page 7: ...face 31 Table 14 Pin Definition of RF Antenna Interfaces 32 Table 15 Operating Frequency of the Module 32 Table 16 Antenna Requirements 35 Table 17 Absolute Maximum Ratings 38 Table 18 Recommended Operating Conditions 39 Table 19 General DC Electrical Characteristics 39 Table 20 Operating and storage Temperatures 40 Table 21 Current Consumption of the Module Low Power Modes Unit mm 40 Table 22 Cur...

Page 8: ...s 33 Figure 11 Microstrip Design on a 2 layer PCB 33 Figure 12 Coplanar Waveguide Design on a 2 layer PCB 34 Figure 13 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as Reference Ground 34 Figure 14 Coplanar Waveguide Design on a 4 layer PCB Layer 4 as Reference Ground 34 Figure 15 Dimensions of the U FL R SMT Connector Unit mm 36 Figure 16 Mechanicals of UF L LP Connectors Unit mm 36 Figure 1...

Page 9: ...d timeaveraging duty factor antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2 1091 2 The EUT is a mobile device maintain at least a 20 cm separation between the EUT and the user s body and must not transmit simultaneously with any other antenna or transmitter 3 A label with the following statements must be attached to the host end product This device contains FCC...

Page 10: ...the manual is provided only in a form other than paper such as on a computer disk or over the Internet the information required by this section may be included in the manual in that alternative form provided the user can reasonably be expected to have the capability to access information in that form This device complies with part 15 of the FCC Rules Operation is subject to the following two condi...

Page 11: ... systems If there is an Airplane Mode it should be enabled prior to boarding an aircraft Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft Wireless devices may cause interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular ter...

Page 12: ...bey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals Areas with explosive or potentially explosive atmospheres include fuelling areas below decks on boats fuel or chemical transfer or storage facilities and areas where the air contains chemicals or particles such as grain dust or metal powders ...

Page 13: ...T coexistence interface FG50V can provide WLAN and BT functions 2 2 Key Features The following table describes the key features of FG50V module Table 1 Key Features Features Details Power Supply Core supply voltage 0 95 V 1 35 V 1 95 V I O supply voltage 1 8 V RF supply voltage 3 85 V Operating Frequency 2 4 GHz WLAN 2 400 2 4835 GHz 5 GHz WLAN 5 150 5 850 GHz BT 2 402 2 480 GHz Transmission Data ...

Page 14: ... 11ax HE40 MCS11 13 dBm 802 11ax HE80 MCS11 13 dBm Protocol Features IEEE 802 11a b g n ac ax BT 5 1 Operation Mode AP STA Modulation BPSK QPSK CCK 16QAM 64QAM 256QAM 1024QAM WLAN Interface PCIe BT Interface UART and PCM RF Antenna Interfaces ANT_WIFI0 ANT_WIFI1 ANT_BT 50 Ω impedance Physical Characteristics Size 19 5 0 2 mm 21 5 0 2 mm 2 1 0 2 mm Package LGA Weight TBD Temperature Range Operating...

Page 15: ...0 PCIe 48MHz XO COEX Control BT UART BT PCM Debug UART 2 WLAN_SLP_CLK Switch BT xLNA BPF ANT_BT Optional dedicated BT antenna switch xLNA Figure 1 Functional Diagram of FG50V Module 2 4 Evaluation Board In order to help you to develop applications with FG50V module conveniently Quectel supplies the evaluation board EVB USB to RS 232 converter cable USB data cable power adapter antenna and other pe...

Page 16: ...ed with 108 LGA pins that can be connected to the cellular application platform The subsequent chapters will provide a detailed introduction to the following interfaces and pins of the module Power supply WLAN interface BT interface Coexistence interface WLAN_SLP_CLK interface Other interfaces RF antenna interfaces means under development NOTE ...

Page 17: ...Wi Fi BT Module Series FG50V Hardware Design FG50V_Hardware_Design 16 54 3 2 Pin Assignment Figure 2 Pin Assignment Top View ...

Page 18: ...AO Analog Input DI Digital Input DO Digital Output IO Bidirectional PI Power Input Power Supply Pin Name Pin No I O Description DC Characteristics Comment VDD_CORE_VL 1 2 47 PI 0 95 V power supply for the module s main part Vmin 0 9 V Vnorm 0 95 V Vmax 1 0 V It must be provided with sufficient current of up to 1 7 A VDD_CORE_VM 45 PI 1 35 V power supply for the module s main part Vmin 1 28 V Vnorm...

Page 19: ... 85 108 WLAN Interface Pin Name Pin No I O Description DC Characteristics Comment WLAN_EN 84 DI WLAN enable VILmin 0 3 V VILmax 0 63 V VIHmin 1 17 V VIHmax 2 1 V 1 8 V power domain Active high It is suggested to pull down this pin with a 100 kΩ resistor PCIE_REFCLK_P 54 AI PCIe reference clock Require differential impedance of 85 Ω PCIE_REFCLK_M 9 AI PCIe reference clock PCIE_TX_P 52 AO PCIe trans...

Page 20: ... output VOLmax 0 45 V VOHmin 1 35 V 1 8 V power domain Externally pull this pin up to VDD_IO BT_RTS 77 DO BT UART request to send VOLmax 0 45 V VOHmin 1 35 V 1 8 V power domain BT_CTS 38 DI BT UART clear to send VILmin 0 3 V VILmax 0 63 V VIHmin 1 17 V VIHmax 2 1 V 1 8 V power domain BT_TXD 39 DO BT UART transmit VOLmax 0 45 V VOHmin 1 35 V 1 8 V power domain BT_RXD 78 DI BT UART receive VILmin 0 ...

Page 21: ...DI WLAN xFEM control for LAA n79 receiver VILmin 0 3 V VILmax 0 63 V VIHmin 1 17 V VIHmax 2 1 V WLAN_TXEN 42 DO WLAN xFEM control to enable WLAN transmit VOLmax 0 45 V VOHmin 1 35 V PA_MUTE 80 DI WLAN xFEM control to disable WLAN PA VILmin 0 3 V VILmax 0 63 V VIHmin 1 17 V VIHmax 2 1 V Other Interfaces Pin Name Pin No I O Description DC Characteristics Comment SW_CTRL 57 DO Switch control VOLmax 0...

Page 22: ... ANT_WIFI0 28 IO BT and WLAN antenna interface 50 Ω impedance ANT_WIFI1 33 IO WLAN antenna interface 50 Ω impedance ANT_BT 25 IO Reserved dedicated BT antenna interface 50 Ω impedance WLAN_SLP_CLK Interface Pin Name Pin No I O Description DC Characteristics Comment WLAN_SLP_CLK 15 DI WLAN sleep clock VILmin 0 3 V VILmax 0 63 V VIHmin 1 17 V VIHmax 2 1 V 1 8 V power domain If unused keep this pin o...

Page 23: ...DD_CORE_VL VDD_CORE_VM VDD_CORE_VH VDD_IO RG50xQ FG50V VDD_RF Typ 3 85 V output DC DC e g DC 5 V input Figure 3 Power Reference Design with RG50xQ Series Pin Name Pin No Description Min Typ Max Unit VDD_CORE_VL 1 2 47 0 95 V power supply for the module s main part 0 9 0 95 1 0 V VDD_CORE_VM 45 1 35 V power supply for the module s main part 1 28 1 35 1 42 V VDD_CORE_VH 46 1 95 V power supply for th...

Page 24: ... Design FG50V_Hardware_Design 23 54 Figure 4 Power Reference Design with Discrete Power Supply Chips 3 5 WLAN Interface The following figure shows the WLAN interface connection between FG50V and the host Figure 4 WLAN Interface Connection ...

Page 25: ...nterface Pin Name Pin No I O Description Comment WLAN_EN 84 DI WLAN enable 1 8 V power domain Active high It is suggested to pull down this pin with a 100 kΩ resistor Pin Name Pin No I O Description Comment PCIE_REFCLK_P 54 AI PCIe reference clock Require differential impedance of 85 Ω PCIE_REFCLK_M 9 AI PCIe reference clock PCIE_TX_P 52 AO PCIe transmit PCIE_TX_M 7 AO PCIe transmit PCIE_RX_P 56 A...

Page 26: ...e design should be complied with so as to meet PCIe Gen2 specifications It is important to route PCIE_TX_P M PCIE_RX_P M and PCIE_REFCLK_P M as differential pairs with total grounding And the differential impedance should be 85 Ω 10 The maximum trace length of each differential pair PCIE_TX_P M PCIE_RX_P M and PCIE_REFCLK_P M should be less than 300 mm and trace length matching within each differe...

Page 27: ...EN 3 6 2 BT_WAKEUP_HOST and HOST_WAKEUP_BT BT_WAKEUP_HOST and HOST_WAKEUP_BT are used to wake up the host and FG50V If you use Quectel RG50x series as the host these two pins can be left unconnected because the wakeup function can be achieved through BT UART The GPIO_1 connected to BT_WAKEUP_HOST must be interruptible Pin Name Pin No I O Description Comment BT_EN 83 DI BT enable 1 8 V power domain...

Page 28: ...The PCM interface is for audio over Bluetooth phone The following table shows the pin definition of PCM interface Table 10 Pin Definition of PCM Interface The following figure shows the PCM interface connection between FG50V and the host means under development Pin Name Pin No I O Description Comment PCM_DIN 76 DI PCM data input 1 8 V power domain PCM_SYNC 35 DI PCM data frame sync 1 8 V power dom...

Page 29: ...0xQ series You can also choose other 5G modules upon validation tests If you have any questions please contact Quectel Technical Support The following table shows the pin definition of UART interface Table 11 Pin Definition of UART Interface Pin Name Pin No I O Description Comment BT_RTS 77 DO BT UART request to send 1 8 V power domain BT_CTS 38 DI BT UART clear to send 1 8 V power domain BT_TXD 3...

Page 30: ...eep these pins open COEX_RXD 16 DI 2 4G WWAN WLAN BT coexistence receive LAA_AS_EN 82 DI Allows LAA n79 to control WLAN xFEM during WLAN sleep mode LAA_TXEN 41 DI WLAN xFEM control to enable LAA n79 transmit LAA_RX 81 DI WLAN xFEM control for LAA n79 receiver WLAN_TXEN 42 DO WLAN xFEM control to enable WLAN transmit PA_MUTE 80 DI WLAN xFEM control to disable WLAN PA The following figure shows the ...

Page 31: ... module is in sleep mode Table 10 Pin Definition of WLAN_SLP_CLK Interface Pin Name Pin No I O Description Comment WLAN_SLP_CLK 15 DI WLAN sleep clock If unused keep this pin open 3 9 Others Interfaces 3 9 1 SW_CTRL The following table shows the pin definition of SW_CTRL Table 11 Pin Definition of SW_CTRL Pin Name Pin No I O Description Comment SW_CTRL 57 DO Switch control 1 8 V power domain Activ...

Page 32: ... domain If unused keep these pins open WLAN_DBG_RXD 65 DI WLAN debug UART receive 3 9 3 BT Debug Interface The following table shows the pin definition of BT debug interface Connect this interface to the test points in your application Table 13 Pin Definition of BT Debug interface Pin Name Pin No I O Description Comment BT_DBG_TXD 23 DO BT debug UART transmit 1 8 V power domain If unused keep thes...

Page 33: ...or antenna connection The following reference circuit design shows an example with ANT_WIFI0 For the other RF antenna interfaces the reference design is the same It is recommended to reserve a π type matching circuit for better RF performance and the π type matching components C1 C2 R1 should be placed as close to the antenna as possible The capacitors are not mounted by default Pin Name Pin No I ...

Page 34: ... impedance of the RF traces is usually determined by the trace width W the materials dielectric constant the height from the reference ground to the signal layer H and the spacing between RF traces and grounds S Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance The following are reference designs of microstrip or coplanar waveguide with different P...

Page 35: ...ately control the characteristic impedance of RF traces to 50 Ω The GND pins adjacent to RF pins should not be designed as thermal relief pads and should be fully connected to ground The distance between the RF pins and the RF connector should be as short as possible and all the right angle traces should be changed to curved ones The recommended trace angle is 135 There should be clearance under t...

Page 36: ...ut RF layout see document 3 3 10 4 Antenna Requirements The following table shows the requirements for antennas Table 16 Antenna Requirements Type Requirements Frequency Range 2 400 2 4835 GHz 5 180 5 825 GHz VSWR 2 1 Recommended Gain 5 38 dBi Typ Max Input Power 50 W Input Impedance 50 Ω Polarization Type Vertical Cable insertion loss 1 dB 3 10 5 Recommended RF Connector for Antenna Installation ...

Page 37: ...54 Figure 15 Dimensions of the U FL R SMT Connector Unit mm U FL LP serial connectors listed in the following figure can be used to match the U FL R SMT Figure 16 Mechanicals of UF L LP Connectors Unit mm The following figure describes the space factor of mated connector ...

Page 38: ...Wi Fi BT Module Series FG50V Hardware Design FG50V_Hardware_Design 37 54 Figure 17 Space Factor of Mated Connector Unit mm For more details visit http www hirose com ...

Page 39: ...he details are listed in the subsequent chapters 4 2 Electrical Characteristics The following table shows the absolute maximum ratings Table 17 Absolute Maximum Ratings Parameter Min Max Unit VDD_CORE_VL 0 3 VDDX 0 2 V VDD_CORE_VM 0 3 VDDX 0 2 V VDD_CORE_VH 0 3 VDDX 0 2 V VDD_IO 0 3 VDDX 0 2 V VDD_RF 0 3 4 8 V Digital I O Input Voltage 0 3 VDD_IO 0 2 V VDDX is the external supply voltage for the c...

Page 40: ...ed operating conditions unless otherwise specified Table 19 General DC Electrical Characteristics Parameter Min Typ Max Unit VDD_CORE_VL 0 9 0 95 1 0 V VDD_CORE_VM 1 28 1 35 1 42 V VDD_CORE_VH 1 85 1 95 2 05 V VDD_IO 1 7 1 8 1 9 V VDD_RF 3 3 3 85 4 25 V Symbol Parameter Min Max Unit VIH High Level Input Voltage 0 65 VDD_IO VDD_IO 0 3 V VIL Low Level Input Voltage 0 3 0 35 VDD_IO V VOH High Level O...

Page 41: ...rature Range 40 95 ºC 1 Within operating temperature range the module is IEEE compliant Module State Wi Fi State VDD_CORE_VL 0 95 V VDD_CORE_ VM 1 35 V VDD_CORE_VH 1 95 V VDD_IO 1 8 V VDD_RF 3 85 V OFF 1 Wi Fi disabled 0 0479 0 210 0 001 0 001 0 018 Idle 2 Wi Fi enabled 117 75 28 91 74 15 23 69 0 218 1 1 OFF A series of commands can be used to set the module to OFF state Wi Fi disabled In this sta...

Page 42: ...330 4 802 11n TX 2 4 GHz HT20 MCS0 442 6 170 6 120 7 2 4 521 2 TX 2 4 GHz HT20 MCS7 443 9 170 2 120 3 2 4 472 9 TX 2 4 GHz HT40 MCS0 475 8 171 2 120 2 2 4 517 2 TX 2 4 GHz HT40 MCS7 476 1 170 7 120 0 2 4 495 2 TX 5 GHz HT20 MCS0 418 7 206 8 118 0 2 7 497 2 TX 5 GHz HT20 MCS7 421 3 206 6 117 4 2 8 427 1 TX 5 GHz HT40 MCS0 452 7 207 6 117 5 2 8 504 3 TX 5 GHz HT40 MCS7 451 9 207 2 116 9 2 8 429 6 80...

Page 43: ...8 488 7 TX 5 GHz VHT80 MCS9 570 0 203 1 117 1 2 8 409 6 802 11ax TX 2 4 GHz HE20 MCS0 452 0 174 6 120 9 2 4 512 1 TX 2 4 GHz HE20 MCS11 449 1 174 2 119 7 2 5 441 9 TX 2 4 GHz HE40 MCS0 481 8 175 4 120 4 2 5 515 3 TX 2 4 GHz HE40 MCS11 483 4 174 5 119 6 2 4 443 2 TX 5 GHz HE20 MCS0 430 1 202 0 135 9 2 8 483 8 TX 5 GHz HE20 MCS11 428 6 201 1 135 1 2 8 393 9 TX 5 GHz HE40 MCS0 461 9 202 2 135 9 2 8 4...

Page 44: ...8 dBm 802 11ax HE20 MCS11 10 5 13 dBm 802 11ax HE40 MCS0 15 5 18 dBm 802 11ax HE40 MCS11 10 5 13 dBm Table 24 Conducted RF Output Power at 5 GHz Frequency Min Typ Unit 802 11a 6 Mbps 15 5 18 dBm 802 11a 54 Mbps 13 15 5 dBm 802 11n HT20 MCS0 15 5 18 dBm 802 11n HT20 MCS7 12 5 15 dBm 802 11n HT40 MCS0 15 5 18 dBm 802 11n HT40 MCS7 12 5 15 dBm 802 11ac VHT20 MCS0 15 17 5 dBm 802 11ac VHT20 MCS8 11 5 ...

Page 45: ...m 802 11ax HE80 MCS11 10 5 13 dBm 4 6 2 Conducted RF Receiving Sensitivity Table 25 Conducted RF Receiving Sensitivity at 2 4 GHz Frequency Receiving Sensitivity Typ 802 11b 1 Mbps 96 dBm 802 11b 11 Mbps 89 dBm 802 11g 6 Mbps 93 dBm 802 11g 54 Mbps 74 dBm 802 11n HT20 MCS0 93 dBm 802 11n HT20 MCS7 73 dBm 802 11n HT40 MCS0 91 dBm 802 11n HT40 MCS7 70 dBm 802 11ax HE20 MCS0 93 dBm 802 11ax HE20 MCS1...

Page 46: ...hroughout the processing handling and operation of any application that incorporates the module Frequency Receiving Sensitivity Typ 802 11a 6 Mbps 94 dBm 802 11a 54 Mbps 75 dBm 802 11n HT20 MCS0 93 dBm 802 11n HT20 MCS7 75 dBm 802 11n HT40 MCS0 91 dBm 802 11n HT40 MCS7 72 dBm 802 11ac VHT20 MCS0 94 dBm 802 11ac VHT20 MCS8 72 dBm 802 11ac VHT40 MCS0 92 dBm 802 11ac VHT40 MCS9 67 dBm 802 11ac VHT80 ...

Page 47: ...Design 46 54 The following table shows the module electrostatic discharge characteristics Table 27 Electrostatic Discharge Characteristics Tested Points Contact Discharge Air Discharge Unit VDD_RF GND 6 10 kV Antenna Interfaces 6 10 kV Other Interfaces 0 5 1 kV ...

Page 48: ...ensions This chapter describes the mechanical dimensions of FG50V module All dimensions are measured in millimeter mm and the dimensional tolerances are 0 05 mm unless otherwise specified 5 1 Mechanical Dimensions of the Module Figure 18 FG50V Top and Side Dimensions Top and Side View Pin1 ...

Page 49: ...Wi Fi BT Module Series FG50V Hardware Design FG50V_Hardware_Design 48 54 Figure 19 FG50V Bottom Dimension Bottom View The package warpage level of the module conforms to JEITA ED 7306 standard NOTE Pin1 ...

Page 50: ...50V_Hardware_Design 49 54 5 2 Recommended Footprint Figure 20 Recommended Footprint Top View 1 For easy maintenance of this module keep at least 3 mm between the module and other components on the motherboard 2 Keep all RESERVED pins open NOTES Pin1 ...

Page 51: ... Top and Bottom Views of the Module Figure 21 Top View of the Module Figure 22 Bottom View of the Module Images above are for illustration purpose only and may differ from the actual module For authentic appearance and label please refer to the module received from Quectel NOTE ...

Page 52: ...ule must be processed in reflow soldering or other high temperature operations within 24 hours Otherwise the module should be stored in an environment where the relative humidity is less than 10 e g a drying cabinet 4 The module should be pre baked to avoid blistering cracks and inner layer separation in PCB under the following circumstances The module is not stored in Recommended Storage Conditio...

Page 53: ...lder paste on the surface of stencil thus making the paste fill the stencil openings and then penetrate to the PCB The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass To ensure the module soldering quality the thickness of stencil for the module is recommended to be 0 13 0 15 mm For more details see document 5 It is suggested that the pea...

Page 54: ... added in the updated version of this document Table 30 Reel Packaging Soak Zone Max slope 1 3 C s Soak time between A and B 150 C and 200 C 70 120 s Reflow Zone Max slope 2 3 C s Reflow time D over 220 C 45 70 s Max temperature 238 C to 246 C Cooling down slope 1 5 to 3 C s Reflow Cycle Max reflow cycle 1 Model Name MOQ for MP Minimum Package TBD Minimum Package TBD FG50V TBD Size TBD N W TBD G W...

Page 55: ...e design 3 Quectel_RF_Layout_Application_Note RF layout application note 4 Quectel_RG500Q_Series_Wi Fi_Application_Note FG50V Wi Fi_application note 5 Quectel_Module_Secondary_SMT_Application_Note Module secondary SMT application note Abbreviation Description AP Access Point BPF Band Pass Filter BPSK Binary Phase Shift Keying BT Bluetooth CCK Complementary Code Keying CTS Clear To Send ESD Electro...

Page 56: ...second MCS Modulation and Coding Scheme MOQ Minimum Order Quantity PA Power Amplifier PCB Printed Circuit Board PCM Pulse Code Modulation QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RoHS Restriction of Hazardous Substances RTS Request To Send RX Receive TBD To Be Determined TX Transmit UART Universal Asynchronous Receiver Transmitter USB Universal Seri...

Page 57: ...igh Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOHmin Minimum Output High Level Voltage Value VSWR Voltage Standing Wave Ratio Wi Fi Wireless Fidelity WLAN Wireless Local Area Network ...

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