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 2003 National Instruments Corp. All rights reserved.

LabVIEW™, National Instruments™, NI™, ni.com™, and NI-VISA™ are trademarks of National Instruments Corporation. 
Product and company names mentioned herein are trademarks or trade names of their respective companies. For patents 
covering National Instruments products, refer to the appropriate location: 

Help»Patents

 in your software, the 

patents.txt

 file on your CD, or 

ni.com/patents

.

April 2003

323256A-01

Where to Start with the NI PXI-7831R

Thank you for purchasing a National Instruments PXI-7831R. This 
document explains how to set up the hardware system and use the 
NI PXI-7831R. This reconfigurable I/O (RIO) device has 96 digital I/O 
(DIO) lines, eight independent, 16-bit analog output (AO) channels, and 
eight independent, 16-bit analog input (AI) channels.

A user-reconfigurable field-programmable gate array (FPGA) controls the 
digital and analog I/O on the NI PXI-7831R. The FPGA on the RIO device 
allows you to define the functionality and timing of the device, whereas 
traditional multifunction I/O (MIO) devices have a fixed functionality 
provided by an application-specific integrated circuit (ASIC). You can 
change the functionality of the FPGA on the RIO device by using 
LabVIEW, a graphical programming environment, and the LabVIEW 
FPGA module to create and download a custom virtual instrument (VI) to 
the FPGA. You can reconfigure the RIO device with a new VI at any time. 
Using LabVIEW, you can graphically design the timing and functionality 
of the RIO device without having to learn the low-level programming 
language or hardware description language (HDL) that is traditionally used 
for FPGA design.

Note

If you have LabVIEW and not the LabVIEW FPGA module, you cannot create new 

FPGA VIs. You can only create VIs that run in LabVIEW to control existing FPGA VIs.

Some applications require tasks such as real-time, floating-point 
processing or data logging while performing I/O and logic on the RIO 
device. You can use the LabVIEW Real-Time Module to perform these 
additional applications while also communicating with and controlling the 
RIO device.

The RIO device contains flash memory to store VIs for instant loading of 
the FPGA when the system is powered on.

ni.com

Summary of Contents for NI PXI-7831R

Page 1: ...ereas traditional multifunction I O MIO devices have a fixed functionality provided by an application specific integrated circuit ASIC You can change the functionality of the FPGA on the RIO device by...

Page 2: ...PCI embedded controller running Windows 2000 XP or any computer running Windows 2000 XP and a MXI 3 link to a PXI CompactPCI chassis At least one cable and terminal block for connecting signals to the...

Page 3: ...e configured on a network The following documents are included on the NI Device Drivers CD and are also available at ni com manuals optional LabVIEW FPGA Module Release Notes LabVIEW FPGA Module User...

Page 4: ...tion and remove the NI Device Drivers CD 7 You must shut down your computer before installing any hardware Unpacking The RIO device is shipped in an antistatic package to prevent electrostatic damage...

Page 5: ...e there are no lighted LEDs on the chassis If any are lit wait until they go out before continuing the installation 4 Remove the filler panel for the peripheral slot that you chose 5 Ground yourself u...

Page 6: ...I lines eight AO lines and 16 DIO lines Figure 1 shows the I O connector locations for the NI PXI 7831R The I O connectors are numbered starting at zero The text in parentheses indicates whether each...

Page 7: ...ND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND 5V 5V DIO28 DIO30 DIO32 DIO34 DIO36 DIO38 DIO0 DIO2 DIO3 DIO5 DIO6 DIO7 DIO8 DIO1 DIO4 DIO9 DIO10...

Page 8: ...ns guide you through running a simple example on the PXI 7831R Running this example confirms that you have installed your software and hardware correctly and it provides a brief introduction to using...

Page 9: ...ponds to the voltage input If you do not have a signal source available connect AI1 and AI1 both to ground and confirm that the number returned by the AI 1 indicator is close to 0 10 The Loop Period c...

Page 10: ...ion on the 1 RIO Board Host VI block diagram using the selection tool This opens the front panel for the Default 7831R FPGA VI Refer to the context help for the Default 7831R FPGA VI for more informat...

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