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iCE40 SPRAM Usage Guide 

 

Technical Note 

TN1314 Version 1.0 

June 2016 

 

Summary of Contents for iCE40 SPRAM Series

Page 1: ...iCE40 SPRAM Usage Guide Technical Note TN1314 Version 1 0 June 2016...

Page 2: ...ons and GUI Options 4 Power Save States for SPRAM 6 3 3 1 Normal State 6 3 2 Standby State 6 3 3 Sleep State 6 3 4 Power Off State 6 Use Cases for User Primitive SB_SPRAM256KA 7 4 4 1 Instantiating Me...

Page 3: ...r 256 kb memory blocks available that is total 1024 kb of Single Port memory Single Port RAM Primitives 2 The iCE40 devices offer four embedded memory blocks of SPRAM Each of these blocks can be confi...

Page 4: ...DATAIN 15 0 D 15 0 Data Input 16b 0000000000000000 The Data Input bus is used to write the data into the memory location specified by Address input port during the write cycle MASKWREN 3 0 WEM 15 0 M...

Page 5: ...us the MASKWREN has to map to WEM as follows MASKWREN 3 WEM 15 MASKWREN 3 WEM 14 MASKWREN 3 WEM 13 MASKWREN 3 WEM 12 MASKWREN 2 WEM 11 MASKWREN 2 WEM 10 MASKWREN 2 WEM 9 MASKWREN 2 WEM 8 MASKWREN 1 WE...

Page 6: ...not change when the RAM is placed in Standby State It is to be noted that Standby State is referred to as Light Sleep state in the RAM datasheet The name STANDBY has been chosen to match and be consis...

Page 7: ...ROFF POWEROFF DATAOUT DATAOUT_A SB_SPRAM256KA ramfn_inst2 DATAIN DATAIN ADDRESS ADDRESS MASKWREN MASKWREN WREN WREN CHIPSELECT CHIPSELECT CLOCK CLOCK STANDBY STANDBY SLEEP SLEEP POWEROFF POWEROFF DATA...

Page 8: ...ogic required will be implemented in the device fabric for creating larger memories Address Cascading or Depth Cascading 4 4 1 Address Depth cascading is useful when the memories are required to have...

Page 9: ...gic is needed essentially for concatenating words from individual SPRAM blocks Figure 4 2 shows an example of the Width cascading of a 16k x 32 SPRAM The rest of the signals that are not shown should...

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