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CYW920706WCDEVAL

CYPRESS SEMICONDUCTOR

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Summary of Contents for WICED CYW920706WCDEVAL

Page 1: ...the information therein All referenced brands product names service names and trademarks are the property of their respective owners 00000005981LF 000 EOS Power Buy Now We have 45 000 LP502030 PCM NTC LD A02554 EEMB Lithium Battery Rectangular 3 7V 250mAh Rechargeable in stock now Starting at 0 034 This EEMB part is fully warrantied and traceable 1 855 837 4225 Give us a call International 1 555 5...

Page 2: ...CYW920706WCDEVAL Hardware User Guide Associated Part Family CYW20706 Doc No 002 16535 Rev Cypress Semiconductor 198 Champion Court San Jose CA 95134 1709 www cypress com ...

Page 3: ...ry 22 8 1 2 Digital I O Pin Interface Mapping 25 8 2 LHL GPIO Capabilities 28 9 Interface Signal Function Selection Restrictions and Considerations 29 9 1 I 2 S and PCM 29 9 2 Serial Peripheral Interfaces 29 9 2 1 SPI1 30 9 2 1 1 SPI1 Master 30 9 2 1 2 SPI1 Slave 31 9 2 2 SPI2 31 9 3 HCI UART 31 9 3 1 SWD Debugging with the HCI UART 32 9 3 2 Bypassing the FTDI chip 32 9 4 Peripheral UART 32 9 5 Br...

Page 4: ...Doc No 002 16535 Rev 3 A 1 Low Power Sleep Mode 43 A 2 Deep Sleep Power Save Mode 43 References 46 Document Revision History 47 Worldwide Sales and Design Support 48 Products 48 PSoC Solutions 48 Cypress Developer Community 48 Technical Support 48 ...

Page 5: ...ore information on the CYW20706 hardware see the CYW20706 datasheet CYW20706 Embedded Bluetooth 4 2 SoC with MCU Bluetooth Transceiver and Baseband Processor 1 For information on using the board with WICED Studio to develop embedded custom applications see the WICED CYW920706WCDEVAL Kit Guide 2 Several paragraphs in the document refer the reader to WICED Studio files variables and data structures ...

Page 6: ...x M3 processor and an integrated transceiver It is a fully embedded device running an embedded BT stack with support for embedded user applications developed with WICED Studio The Cypress CYW920706WCDEVAL board Figure 1 1 is an evaluation board that provides various pins jumpers switches ports and test points to access CYW20706 to perform debug evaluation and troubleshooting Figure 1 1 CYW920706WC...

Page 7: ...0BProduct Description CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 6 Figure 1 2 shows the pins connected to the user accessible headers on the board Figure 1 2 User Accessible headers ...

Page 8: ...535 Rev 7 2 Board Layout Figure 2 1 shows the location of key jumpers and switches on the CYW920706WCDEVAL board Figure 2 1 CYW920706WCDEVAL Evaluation Board Layout and Component Locations Note Jumpers which are shorted by default are identified in red ...

Page 9: ...CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 8 3 Board Block Diagram Figure 3 1 shows the block diagram of CYW20706 connections on the CYW920706WCDEVAL board Figure 3 1 Board Block Diagram ...

Page 10: ...te Description Serial Flash 1 ON Set this switch ON to power the serial flash from VDDIO 2 ON Set this switch ON to enable the SPI MISO connection between CYW20706 and serial flash 3 ON Set this switch ON to enable the SPI MOSI connection between CYW20706 and serial flash 4 ON Set this switch ON to enable the SPI CS connection between CYW20706 and serial flash 5 ON Set this switch ON to enable the...

Page 11: ...706 BT_UART_RXD to FTDI TX J26 3 and 4 Shorted Connects CYW20706 BT_UART_TXD to FTDI RX J26 5 and 6 Shorted Connects CYW20706 BT_UART_CTS to FTDI RTS J26 7 and 8 Shorted Connects CYW20706 BT_UART_RTS to FTDI CTS J29 Open Short this jumper to connect GPIO P15 to the RX of the second FTDI com port for debugging purposes J30 Open Short this jumper to connect GPIO P15 to VDDIO for battery monitoring a...

Page 12: ...ep mode 0 328 0 083 0 411 mA Sniff link 1 28s 4 attempts 0 timeout no scans sleep mode 1 250 0 084 1 334 mA Table 5 1 Low Power Bluetooth Current Table 5 2 lists the jumper locations for measuring current Note Remove the listed jumper and measure the current across the exposed pins To Measure Remove the Jumper and Measure Across IO Domain VDDIO J3 1 2V LDO input 1 2V Core Radio J9 2 5V LDO input 2...

Page 13: ...Schematics CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 12 6 Schematics Figure 6 1 CYW920706WCDEVAL Baseband Schematic ...

Page 14: ...Schematics CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 13 Figure 6 2 CYW920706WCDEVAL RF Schematic ...

Page 15: ...Schematics CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 14 Figure 6 3 CYW920706WCDEVAL Power Headers Schematic ...

Page 16: ...Schematics CYW920706WCDEVAL Hardware User Guide Doc No 002 16535 Rev 15 Figure 6 4 CYW920706WCDEVAL USB to UART Interface Schematic ...

Page 17: ... Signals Pins Notes XTAL frequency selection1 BT_XTAL_STRAP_0 G3 F2 G3 XTAL 0 0 40 MHz 0 1 24 MHz 1 0 20 MHz 1 1 Read from NV memory BT_XTAL_STRAP_1 F2 Device reset RST_N A6 Active LOW reset input OTP usage BT_OTP_3P3V_ON G2 Pull HIGH if OTP is used otherwise pull LOW HCI UART BT_UART_RXD F5 HCI UART receive data or SWDIO see 9 3 1 BT_UART_TXD F4 HCI UART transmit data or SWDCLK see 9 3 1 BT_UART_...

Page 18: ...ary clock outputs An infrared learning IR_RX input and playback IR_TX output A keyboard scan output KSO3 Four optical control outputs QOC0 through QOC3 for use in quadrature or rotary encoders A 60 Hz input 60Hz_main to a zero crossing detector Two triac control outputs Two external Transmit Receive T R switch control outputs TX_PD and TX_PD Multiple inputs from quadrature detectors QDX0 QDX1 QDY0...

Page 19: ...t J22 8 if the I2 S PCM function is deselected and P3 and P29 are I O disabled This pin can be configured as I2 C SDA by calling wiced_hal_i2c_init WICED_I2C_SDA_P35_SCL_P37 which selects the I2C_SDA on P35 B5 BT_GPIO_5 P15 BT_GPIO_5 HIGH3 I O General Purpose I O P15 Floating O GPIO to monitor battery or general purpose I O B6 BT_GPIO_6 P11 P26 BT_GPIO_6 LOW3 I O General Purpose I O P11 Floating I...

Page 20: ...2 S function and disable I O P12 This pin can be configured as I2C_SDA by calling wiced_hal_i2c_init WICED_I2C_SDA_I2S_DOUT_PCM_OUT_SCL_I2S_DIN_PCM_IN which selects the I2C_SDA on I2S_PCM_IN P12 Floating I O No specific function defined It can be monitored at J22 7 if the I2 S PCM function is deselected C8 I2S_WS_PCM_SYNC P0 P34 I2S_WS_PCM_SYNC LOW3 I O I2S_WS To use set SW5 3 to the OFF position ...

Page 21: ...if I O P25 is disabled F8 BT_DEV_WAKE P36 P38 BT_DEV_WAKE LOW3 I A signal from the host to CYW20706 that the host requires attention P36 Floating O master I slave GPIO_P36 programmed as SPI1_CS To use disable I O P38 P38 Floating I O No specific function defined It can be monitored at J19 6 if I O P36 is disabled G8 BT_CLK_REQ P4 P24 P4 Floating I O No specific function defined It can be monitored...

Page 22: ...ons that if used in a design will restrict the set of digital I O pins available for assigning GPIOs If This Interface or Signal Function Is Used Then These Pins Cannot Be Used for GPIO_Pxx Assignments I2 S PCM A8 B7 C7 and C8 BT_CLK_REQ G8 BT_DEV_WAKE1 F8 BT_HOST_WAKE1 F7 LPO_IN D6 Table 8 1 Key Interface or Signal Function Pin Assignments These signal functions can be used to wake CYW20706 from ...

Page 23: ...A D converter input 10 O PWM output PWM3 P35 I O General purpose user defined GPIO I A D converter input A D input 4 I Y coordinate output from a quadrature detector QDY1 I Peripheral UART CTS input PUART_CTS I O BSC SDA I2C_SDA B5 P15 I O General purpose user defined GPIO I A D converter input A D input 20 I Infrared learning input IR_RX I 60 Hz input 60Hz_main to a zero crossing detector B6 P11 ...

Page 24: ... I A D converter input A D input 2 I Z coordinate output from a quadrature detector QDZ1 O SPI1_MISO slave O Auxiliary clock output ACLK1 O BSC SCL I2C_SCL C5 P272 I O General purpose user defined GPIO O SPI1_MOSI master I SPI1_MOSI slave O Optical control output QOC1 O Triac control 2 O PWM output PWM1 P33 I O General purpose user defined GPIO I A D converter input A D input 6 I X coordinate outp...

Page 25: ...coordinate output from a quadrature detector QDY0 I Peripheral UART RX input PUART_RX O T R switch control TX_PD D6 P6 I O General purpose user defined GPIO I Z coordinate output from a quadrature detector QDZ0 O Peripheral UART RTS input PUART_RTS I SPI1_CS slave I 60 Hz input 60Hz_main to a zero crossing detector P31 I O General purpose user defined GPIO I A D converter input A D input 8 O Perip...

Page 26: ...K slave O Peripheral UART TX output PUART_TX Table 8 2 CYW20706 Multiplexed GPIO_Pxx Interface Summary Note Table 8 2 provides GPIO information for the full capabilities of CYW20706 Some CYW20706 based modules may not support all GPIOs Check the module schematic and other documentation to determine which GPIOs are available 8 1 2 Digital I O Pin Interface Mapping Table 8 3 shows the mapping of CYW...

Page 27: ...ure decoder multiplexed to GPIO_P6 as an input External LPO input LPO_IN an external LPO input connected to pin D6 No GPIOs are used in this case A system designer will select one signal function from the set of possible signal functions available at pin D6 For example if the system design requires a peripheral UART the PUART_TX signal function might be assigned and configured to pin D6 using GPIO...

Page 28: ...P35 X P35 B5 J22 3 J24 1 P15 P15 P15 P15 B6 J22 4 J23 5 P11 P26 P26 P11 P11 P26 P26 P26 B7 J22 5 P2 P28 P37 P2 P2 P2 P37 P28 P37 P37 P28 P28 P2 P37 X P37 C5 J19 5 J21 7 P33 P27 P33 P27 P33 P33 P33 P27 P27 P27 P33 C6 J19 2 J23 4 P30 P30 P30 C7 J22 7 J23 5 J21 1 P12 P12 X C8 J22 6 J23 6 P0 P34 P34 P0 P0 P0 P34 P0 P0 P34 P34 X D6 J19 1 P6 P31 P31 P6 P6 P31 P6 P6 X F7 J19 4 J21 6 P25 P32 P25 P32 P32 P...

Page 29: ... P26 P29 can source or sink 16 mA at 3 3 V and 8 mA at 1 8 V All GPIOs can be configured for edge rising falling both or level interrupts Below is an example GPIO configuration for an input with a resistive pulldown that is enabled and a rising edge interrupt wiced_hal_gpio_configure_pin gpio_num GPIO_INPUT_ENABLE GPIO_PULL_DOWN GPIO_EN_INT_RISING_EDGE GPIO_PIN_OUTPUT_LOW Application level interru...

Page 30: ...e the Following GPIO_Pxx A8 I2S_DO or PCM_OUT P0 P2 P3 P12 P28 P29 P34P35 and P37 B7 I2S_CLK or PCM_CLK C7 I2S_DI or PCM_IN C8 I2S_WS or PCM_SYNC Table 9 1 Shared I 2 S and PCM Interface and GPIO_Pxx Usage Restrictions 9 2 Serial Peripheral Interfaces CYW20706 supports two serial peripheral interface SPI blocks SPI1 also known as Spiffy1 and SPI2 also known as Spiffy2 The routing of the SPI1 inter...

Page 31: ...o source each required slave chip select output The application controls Chip Select CS line assertion and de assertion and can use the CS line to optimize transactions greater than 254 bytes Note The software application controls the chip selects using a GPIO driver provided by the WICED Studio API See Section 10 Interface Programming Information and Examples for more information Table 9 2 shows ...

Page 32: ...ave programming example see Section 10 3 SPI1 Slave Programming Example 9 2 2 SPI2 The SPI2 interface is provided as a CYW20706 connection to nonvolatile memory for accessing configuration patches application code and application data The SPI2 interface supports SPI clock modes 0 through 4 A maximum transaction size of 254 bytes A maximum clock speed of 12 MHz for all I O supply levels Operation a...

Page 33: ... chip can be bypassed and the board can be powered in 2 different ways Powering the board from USB 1 Remove All jumpers on J26 2 Plug in the USB cable to power up the board as usual Powering the board using External supply 1 Remove All jumpers on J26 2 Supply 3 3V to TP1 9 4 Peripheral UART CYW20706 supports a peripheral UART PUART The following information applies to the peripheral UART It is pri...

Page 34: ...33 F7 P32 D6 P6 A8 P3 10 C5 P33 F7 P32 D6 P6 A8 P35 11 C5 P33 G8 P24 C6 P30 A8 P3 12 C5 P33 G8 P24 C6 P30 A8 P35 13 C5 P33 G8 P24 D6 P6 A8 P3 14 C5 P33 G8 P24 D6 P6 A8 P35 15 C8 P34 D6 P31 C6 P30 A8 P3 16 C8 P34 D6 P31 C6 P30 A8 P35 17 C8 P34 F7 P32 C6 P30 A8 P3 18 C8 P34 F7 P32 C6 P30 A8 P35 19 C8 P34 F7 P32 D6 P6 A8 P3 20 C8 P34 F7 P32 D6 P6 A8 P35 21 C8 P34 G8 P24 C6 P30 A8 P3 22 C8 P34 G8 P24 ...

Page 35: ...s shown in the table below The parameter used for the wiced_hal_i2c_init function call for each selection of pins is also provided SDA SCL Configuration Parameter Name Pin C7 I2S_DIN PCM_IN SDA1 Pin A8 I2S_DOUT PCM_OUT SCL1 WICED_I2C_SDA_I2S_DOUT_PCM_OUT_SCL_I2S_DIN_PCM_IN Pin A8 P35 Pin B7 P37 WICED_I2C_SDA_P35_SCL_P37 Pin E8 SFLASH_MOSI 2 Pin D8 SFLASH_MISO2 WICED_I2C_SDA_SFLASH_MOSI_SCL_SFLASH_...

Page 36: ...ple see Section 10 4 BSC Programming Example 9 6 NVRAM CYW20706 has NVRAM which can be used to save the state of the device while power is off For example an application can use the NVRAM to save the Bluetooth Device address of a paired device During a future connection establishment the application can check whether the connecting device is paired or not ...

Page 37: ... hal_gpio_app c file in WICED Studio For information on the API functions that support SPI1 configuration control and data exchange refer to wiced_hal_pspi h To generate chip select CS signals to attached slaves refer to wiced_hal_gpio h For information on the API functions that pertain to PUART access refer to wiced_hal_puart h The remaining paragraphs in this section provide the following progra...

Page 38: ...APP_TIMEOUT_IN_SECONDS_A uint32_t curr_blink_interval 0 Get the status of interrupt on P if wiced_hal_gpio_get_pin_interrupt_status WICED_GPIO_BUTTON Clear the gpio interrupt wiced_hal_gpio_clear_pin_interrupt_status WICED_GPIO_BUTTON stop the led blink timer wiced_stop_timer seconds_timer toggle the blink time interval curr_blink_interval APP_TIMEOUT_IN_SECONDS_A prev_blink_interval APP_TIMEOUT_I...

Page 39: ...RACE gpio_test_led n r Configure LED PIN as input and initial outvalue as high wiced_hal_gpio_configure_pin LED_GPIO_1 GPIO_OUTPUT_ENABLE GPIO_PIN_OUTPUT_HIGH if wiced_init_timer seconds_timer seconds_app_timer_cb 0 WICED_SECONDS_PERIODIC_TIMER WICED_SUCCESS if wiced_start_timer seconds_timer APP_TIMEOUT_IN_SECONDS_A WICED_SUCCESS WICED_BT_TRACE Seconds Timer Error n r 10 2 SPI1 Master Programming...

Page 40: ...pio_set_pin_output WICED_GPIO_15 SPIFFY_CS_DEASSSERT 10 3 SPI1 Slave Programming Example The following code shows how to initialize SPI1 as a slave write a byte to a SPI master and read a byte from a SPI master include wiced_hal_pspi h define SLAVE1_P36_CS_P24_CLK_P27_MOSI_P25_MISO 0x24181b19 Refer Hardware peripherals doc define SPIFFY_SPEED 1000000 Use 1M speed void test_pspi_driver void Initial...

Page 41: ...o the lower level driver is 0 define I2C_SLAVE_OPERATION_WRITE 1 Write operation to the lower level driver is 1 Sample code to test i2c driver void test_i2c_driver void uint8_t data_array 123456 Initializes the I2C driver and its private values This initialization sets the bus speed to 100KHz by default I2CM_SPEED_100KHZ wiced_hal_i2c_init current I2C bus speed wiced_hal_i2c_get_speed Sets the I2C...

Page 42: ...le code to test puart driver Initializes puart selects puart pads turn off flow control and enables Tx and Rx Echoes the input byte with increment by 1 void test_puart_driver void uint8_t read_5_bytes 5 wiced_hal_puart_init Possible uart tx and rx combination Pin for Rx p2 Pin for Tx p0 Note that p2 and p0 might not be available for use on your specific hardware platform Please see the User Docume...

Page 43: ...6 BD_ADDR bd_addr_read void test_nvram_read_write_app uint8_t written_bytes read_bytes wiced_result_t status Write BD ADDR to NVRAM written_bytes wiced_hal_write_nvram APP_VS_ID BD_ADDR_LEN bd_addr_write status WICED_BT_TRACE status of nvram write d number of bytes written d n status written_bytes Read BD ADDR from NVRAM read_bytes wiced_hal_read_nvram APP_VS_ID BD_ADDR_LEN bd_addr_read status WIC...

Page 44: ... and third arguments are not needed for embedded SoC applications they are only used in external MCU scenarios where BT_DEV_WAKE F8 can be used by an external MCU to wake the device and BT_HOST_WAKE can be used by the device as a wake signal to an external MCU A 2 Deep Sleep Power Save Mode The APIs used to utilize Deep Sleep Power Save Mode are described below followed by code snippets showing th...

Page 45: ...nsition to deep sleep is no longer active An application can react to a power save abort by once again invoking wiced_power_save_start Use wiced_power_save_stop to instruct CYW20706 to cancel a previously requested deep sleep transition This can be called by the application any time after the call to wiced_power_save_start and before the callback registered for transition entry notification is cal...

Page 46: ...d power_save_enter void too late to try to stop it now can only store state wiced_power_save_store_state persistent_state_info WICED_BT_TRACE Entering deep sleep now n void power_save_abort void device has aborted the deep sleep it will not retry further unless requested WICED_BT_TRACE Deep Sleep request aborted n if doesAppStillWantToSleep WICED_BT_TRACE Re init deep sleep request n wiced_power_s...

Page 47: ...16535 Rev 46 References Document or Item Name Number Source 1 CYW20706 Embedded Bluetooth 4 2 SoC with MCU Bluetooth Transceiver and Baseband Processor 002 14790 community cypress com 2 WICED CYW920706WCDEVAL Kit Guide 002 18191 community cypress com ...

Page 48: ...are User Guide Doc No 002 16535 Rev 47 Document Revision History Document Title CYW920706WCDEVAL Hardware User Guide Document Number 002 16535 Revision ECN Issue Date Description of Change 5829476 07 26 2017 Initial release ...

Page 49: ...ied to make use distribute and import the Software solely for use with Cypress hardware products Any other use reproduction modification translation or compilation of the Software is prohibited TO THE EXTENT PERMITTED BY APPLICABLE LAW CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE INCLUDING BUT NOT LIMITED TO THE IMPL...

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