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Copyright Notice

This document is copyrighted, 2003. All rights are reserved. The
original manufacturer reserves the right to make improvements to the
products described in this manual at any time without notice.
No part of this manual may be reproduced, copied, translated or
transmitted in any form or by any means without the prior written
permission of the original manufacturer. Information provided in this
manual is intended to be accurate and reliable. However, the original
manufacturer assumes no responsibility for its use, nor for any
infringements upon the rights of third parties which may result from its
use.

Acknowledgments

MS-DOS, Windows®, Microsoft® Visual C++ and Visual BASIC are
trademarks of Microsoft® Corporation. Intel® and Pentium® are
trademarks of Intel Corporation. Delphi and C++ Builder are
trademarks of Borland Software Corporation.

CE notification

The MIC-3756, developed by ADVANTECH CO., LTD., has passed
the CE test for environmental specifications when shielded cables are
used for external wiring. We recommend the use of shielded cables.
This kind of cable is available from Advantech. Please contact your
local supplier for ordering information.

On-line Technical Support

For technical support and service, please visit our support we bsite at:

http://www.advantech.com/support

Part No.2003375600 1st Edition

Printed in Taiwan October 2003

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Summary of Contents for MIC-3756

Page 1: ... third parties which may result fromits use Acknowledgments MS DOS Windows Microsoft Visual C and Visual BASIC are trademarks of Microsoft Corporation Intel and Pentium are trademarks of Intel Corporation Delphi and C Builder are trademarks of Borland Software Corporation CE notification The MIC 3756 developed by ADVANTECH CO LTD has passed the CE test for environmental specifications when shielde...

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Page 3: ...4 3 Pin Assignment and Jumper Setting 19 3 1 Pin Assignment 19 3 2 Location of Jumpers and DIP switch 22 3 3 Isolated Digital Input Connections 23 3 4 Isolated Digital Output Connections 24 3 5 Field Wiring Considerations 26 4 Operations 29 4 1 Interrupt Function 29 4 2 Board ID 33 4 3 Channel Freeze Function 35 4 4 Counter Function 38 Appendix A Specifications 45 ...

Page 4: ...iv Appendix B Register Structure format 47 B 1 Register Structure 47 B 2 Register Format 48 Appendix C Waveform of Counter Mode 51 ...

Page 5: ...ng edge control bit values 31 Table 4 5 Interrupt flag bit values 32 Table 4 6 Board ID register 33 Table 4 7 Board ID setting 34 Table 4 8 JP2 Channel Freeze function input mode 36 Table 4 9 Channel Freeze function register 37 Table 4 10 Channel Freeze function bit value 37 Table 4 11 Counter Mode Register 38 Table 4 12 Counter Read Register 39 Table 4 13 Set Value Register 39 Table 4 14 Counter ...

Page 6: ...1 I O Connector pin assignments for the MIC 3756 20 Fig 3 2 Location of Jumpers and DIP switch on MIC 3756 22 Fig 3 3 Isolated digital input connection 23 Fig 3 4 Isolated Digital Output Connection 25 Fig 4 2 The wiring in wet dry contact input mode 36 ...

Page 7: ...1 Introduction 1 CHAPTER ...

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Page 9: ...r data acquisition and control It is a powerful data acquisition DAS card for the CompactPCI bus 1 1 Features w CPCI bus specification 2 1 compliant w CPCI 3U size card w 32 isolated digital input channels w 32 isolated digital output channels w High voltage isolation for input output channels 2 500 VDC w Wide input range 10 50 VDC w Wide output range 5 40 VDC w High sink current on isolated outpu...

Page 10: ...or applications in industrial lab and machinery automation The MIC 3756 can durably withstand voltages up to 2 500 VDC preventing your host system from any incidental harms Even with an input voltage rising up to 70 VDC the input channels of MIC 3756 can still manage to work properly albeit only for a short period of time Wide Input Output Range The MIC 3756 has a wide range of input voltage from ...

Page 11: ...dentify and access each card during hardware configuration and software programming Channel Freeze Function The MIC 3756 provides Channel Freeze function which can be enabled either in dry contact or wet contact mode selectable by the on board jumper JP2 When the Channel Freeze function is enabled the last status of each digital output channel will be safely kept for emergency use Moreover you can...

Page 12: ...terface CPCI bus specification 2 1 compliant Bus Controller PLX9030 Dimensions 160 mm L x 100 mm W Operating temperature 0 60 C referring to IEC68 2 1 2 Operating Humidity 5 95 Relative Humidity non condensing referring to IEC 68 2 1 2 Storage Temperature 20 80 C See the Appendix A for more details Hot Swap ...

Page 13: ...7 Hardware Configuration CHAPTER 2 ...

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Page 15: ...erfect working order on receipt As you unpack the CompactPCI card series check it for signs of shipping damages damaged box scratches dents etc If it is damaged or fails to meet specifications notify our service department or your local sales representative immediately and your carrier Retain the shipping carton and packing materials for inspection by the carrier Upon inspection we will make all n...

Page 16: ...should avoid contact with materials that hold a static charge such as plastic vinyl and Styrofoam Handle the board only by its edges to avoid static damage to its integrated circuits Avoid touching the exposed circuit connectors We also recommend that you use a grounded wrist strap and place the card on a static dissipative mat whenever you work with it ...

Page 17: ...leted you can now go on to install the MIC 3756 card in your CompactPCI system If you have any doubt please consult the user s manual or related documentation Please follow the following steps to install the card on your system To install a card Step 1 Remove one cover on the unusedslot of your CompactPCI computer slot Step 2 Hold the Card Vertically Be sure that the card is pointing in the correc...

Page 18: ... forcing it into the chassis Step 6 Now push the card into the right place and the Blue LED will turn off Step 7 After the Blue LED is off push the handle to secure the card and lock it into place Step 8 Because the CompactPCI system can Hot Swap if your CompactPCI computer power is on the system can configure the card automatically Once the system finished configuration you can find the card info...

Page 19: ...13 system will automatically uninstall the card configuration Step 2 Once the system completes the configuration the Blue LED will lit Now you can slide the card out ...

Page 20: ...14 2 3 Board Layout Fig 2 1 MIC 3756 board layout ...

Page 21: ...15 Connector MIC 3756 has one 78 pin DB female connector For more details about jumper switch and connector please see Chapter 4 Pin Assignment Jumper Setting and Chapter 5 Operation ...

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Page 23: ...17 Pin Assignment and Jumper Setting CHAPTER 3 ...

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Page 25: ...avoid unnecessary and costly damage to your system and other hardware devices This chapter provides useful information about how to connect input and output signals to the MIC 3756 via the I O connector 3 1 Pin Assignment The I O connector on the MIC 3756 is a 78 pin DB female connector Fig 3 1 shows the pin assignments for the 78 pin DB connector on the MIC 3756 and Table 3 1 shows its connector ...

Page 26: ...20 Fig 3 1 I O Connector pin assignments for the MIC 3756 ...

Page 27: ...nput Isolated digital input of group 1 Counter Output DO00 PCOM1 Output Counter Output Isolated digital output D000 of group0 DO 01 15 PCOM1 Output Isolated digital output of group 0 DO 16 31 PCOM2 Output Isolated digital output of group 1 ECOM1 Input External common input of group 0 ECOM2 Input External common input of group 1 PCOM1 Output External common output of group 0 PCOM2 Output External c...

Page 28: ...MIC 3756 There are two jumpers JP2 JP3 and one DIP switch SW1 on the MIC 3756 Please refer to Section 4 3 Isolated Digital Output Connection Section 5 2 Board ID and Section 5 3 Channel Freeze Function for more information about JP2 JP3 and SW1 configurations Fig 3 2 Location of Jumpers and DIP switch on MIC 3756 ...

Page 29: ...g the interrupt control register For detailed information please refer to Section 5 1 Interrupt Function Isolated Inputs Each isolated digital input channels accepts 10 50 VDC voltage input and accepts bi directional input which means that you can apply positive or negative voltage to an isolated input pin Every 16 input channels share one common pins Fig 3 3 shows how to connect an external input...

Page 30: ...et When the system resets the status of isolated digital output channels are selected by jumper JP3 Table 3 2 shows the configuration of jumper JP3 Table 3 2 JP3 Power on configuration after hot reset MIC 3756 JP3 Power on configuration after hot reset Keeps last status after hot reset Loads default configuration while resetting Isolated Outputs Each isolated output channels come equipped with a D...

Page 31: ...ent will flow from the external voltage source to the card Please keep in mind that the current through each IDO pin do not exceed 200 mA Fig 3 4 shows how to connect an external output load to the card s isolated outputs Fig 3 4 Isolated Digital Output Connection ...

Page 32: ...deo monitor since it can significantly affect a data acquisition system If the cable travels through an area with significant electromagnetic interference you should adopt individually shielded twisted pair wires as the analog input cable This type of cable has its signal wires twisted together and shielded with a metal mesh The metal mesh should only be connected to one point at the signal source...

Page 33: ...27 Operations CHAPTER 4 ...

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Page 35: ...ble interrupt function select trigger type or latch the port data by setting the Interrupt Control Register of the MIC 3756 When the interrupt request signals occur then the software will service these interrupt requests by ISR The multiple interrupt sources provide the card with more capability and flexibility IRQ Level The IRQ level is set automatically by the PCI plug and play BIOS and is saved...

Page 36: ...ontrol bit INTn E Interrupt disable enable control bit En Interrupt triggering edge control bit Fn Interrupt flag bit Latch Port Data Function The function enables you to latch the last data of each associated digital input channels when the interrupt occurs and you can free the latch function by clearing interrupt We have organized every 16 bits in one group When the Latch Port Data Function is e...

Page 37: ...ol register as shown in Table 4 3 Table 4 3 Interrupt disable enable control bit values INTn E Interrupt control 0 Disable 1 Enable Interrupt Triggering Edge Control The interrupt can be triggered by a rising edge or a falling edge of the interrupt signal as determined by the value in the interrupt triggering edge control bit in the interrupt control register as shown in Table 4 4 Table 4 4 Interr...

Page 38: ... To find the status of the interrupt you have to read the bit value to clear the interrupt you have to write 1 to this bit This bit must first be cleared to service the next incoming interrupt Table 4 5 Interrupt flag bit values Fn Interrupt status Read 0 No interrupt 1 Interrupt occur Write 0 Don t care 1 Clear interrupt ...

Page 39: ...ssis this board ID setting function is useful for identifying each card s device number through board ID We set the MIC 3756 board ID as 0 If you need to adjust it to other board ID set the SW1 by referring to the Table 4 7 Table 4 6 Board ID register Board ID register Base Add 10 h 3 2 1 0 Abbreviation ID3 ID2 ID1 ID0 ID0 the least significant bit LSB of Board ID ID3 the most significant bit MSB ...

Page 40: ...n 3 2 1 0 0 ON ON ON ON 1 ON ON ON OFF 2 ON ON OFF ON 3 ON ON OFF OFF 4 ON OFF ON ON 5 ON OFF ON OFF 6 ON OFF OFF ON 7 ON OFF OFF OFF 8 OFF ON ON ON 9 OFF ON ON OFF 10 OFF ON OFF ON 11 OFF ON OFF OFF 12 OFF OFF ON ON 13 OFF OFF ON OFF 14 OFF OFF OFF ON 15 OFF OFF OFF OFF Default ...

Page 41: ...termine that If Channel Freeze function is disabled it will return the DO value on the port If Channel Freeze function is enabled it will return the value from the buffers on host PC The MIC 3756 provides digital input channel CH_FRZ_IN to enable channel freeze function The channel freeze function acts when the pin CH_FRZ_IN is activated Moreover you can setup the input mode of channel freeze func...

Page 42: ...e of 1 for the CFS bit indicates an active Channel Freeze Function whereas a value of 0 indicates a non active Channel Freeze Function Table 4 8 JP2 Channel Freeze function input mode MIC 3756 JP2 Input Mode Dry contact input mode Normal mode Wet contact input mode Fig 4 2 The wiring in wet dry contact input mode ...

Page 43: ...ion register Channel Freeze function register Base Add 12 h 3 2 1 0 Abbreviation CFS CFC Table 4 10 Channel Freeze function bit value CFC Channel Freeze function control 0 Disable 1 Enable CFS Channel Freeze function status 0 OFF 1 ON ...

Page 44: ...gister Counter Gate control CM1 CM0 00 stop counter 01 DI16 as GATE high 10 DI16 as GATE low 11 No Gating Interrupt Control Register CM2 0 disable interrupt 1 Enable interrupt CLK source control CM3 0 DI00 1 1MHz clock source on broad DO00 output Control CM5 CM4 00 Digital Output DO00 01 Counter output TC Toggle from low 10 Counter output TC Table 4 12 shows the counter read back value register Us...

Page 45: ...wer on and counter reset Table 4 14 shows the counter reset register Table 4 14 Counter Reset Register Counter Reset Register Bit 1 0 X 0 reset all counter register 01 only clear TC toggle output NOTE X means don t care Set Value Register Base Add 18h Bit 15 0 Abbreviation SE15 0 Counter Reset Register Base Add Eh Bit 15 2 Bit1 Bit0 Abbreviation N A Clear TC Toggle Reset All Count register ...

Page 46: ...ontrol Counter mode bits CM 4 and CM 5 specify the output control configuration Refer to register format select the active output type Digital output Counter output TC or TC Toggle from low output waveforms One output form available is called Terminal Count TC and represents the period in time that the counter reaches an equivalent value in the Set Value Register Base Add 18h The TC width is deter...

Page 47: ...CM3 specify the source used as input to the counter and the active edge that is counted Logic 1 counter clock comes from 1M crystal on board Logic 0 counter clock come from DI00 pin Gating Control Counter Mode bits CM1 and CM0 specify the hardware gating options When no gating is selected CM1 CM0 11 the counter will proceed unconditionally as long as it is clocked For any other gating mode the cou...

Page 48: ...lected CM1 CM0 00 counting will stop and the current value of the counter is held in the Counter Read Register Base add 14h Counter Reset This command will reset the counter set value set mode and INT register to a preset condition The value is 0000 hex NOTE The default value of register is 0000 ...

Page 49: ...43 Appendixes ...

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Page 51: ...r voltage Protect 70 V DC VIH max 50 V DC VIH min 5 V DC Input Voltage VIL max 2 V DC Input Resistance 1KΩ 50V 4KΩ 5V OFF delay mean the Photo Couple turn OFF delay time when DI input voltage be removed ON delay mean the Photo Couple turn ON delay time when DI input voltage be connected up Isolated Digital Output Number of Output Channel 32 Optical Isolation 2500 VDC OFF delay 20 ON delay 20 DO re...

Page 52: ...ter DI16 as GATE high DI16 as GATE low Gate Control No Gating General I O Connector Type 78 pin DB female Dimensions 160 mm L x 100 mm W 5V 220 mA Power Consumption 3 3V 260 mA Operation 0 60 C refer to IEC 68 2 1 2 Temperature Storage 20 80 C Relative Humidity 5 95 RH non condensing refer to IEC 68 2 3 Certification CE Class A certified ...

Page 53: ...mming by register The most important consideration in programming the MIC 3756 at the register level is to understand the function of the card s registers The information in the following sections will assist users who would program their own low level programming The MIC 3756 requires 32 consecutive addresses in the PC s I O space The address of each register is specified as an offset from the ca...

Page 54: ...DO9 DO8 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Digital Output Group 0 4 W DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Digital Output Group 1 Read Back R DO31 DO30 DO29 DO28 DO27 DO26 DO25 DO24 DO23 DO22 DO21 DO20 DO19 DO18 DO17 DO16 Digital Output Group 1 6 W DO31 DO30 DO29 DO28 DO27 DO26 DO25 DO24 DO23 DO22 DO21 DO20 DO19 DO18 DO17 DO16 Group 0 Interrupt Control Register R F0 E...

Page 55: ...er R ID3 ID2 ID1 ID0 N A 10 W Channel Freeze Function Control Register R CFS CFC Channel Freeze Function Status Register 12 W CFC Counter Read Register R CR15 CR14 CR13 CR12 CR11 CR10 CR9 CR8 CR7 CR6 CR5 CR4 CR3 CR2 CR1 CR0 NA 14 W INT State of Counter R INT Clear INT of Counter 16 W NA R Set Value Register 18 W SE15 SE14 SE13 SE12 SE11 SE10 SE9 SE8 SE7 SE6 SE5 SE4 SE3 SE2 SE1 SE0 R 1E W ...

Page 56: ...50 Note Write 1 to the bit Fn in Interrupt Control Register clears the interrupt ...

Page 57: ...e the value in the set value register determines the time between TCs The counter output mode may be obtained with the TC output mode or the TC Toggled output mode by specifying in the Counter Mode register CM5 CM4 Toggled output uses the trailing edge of TC to toggle a flip flop to generate an output level instead of a pulse During the TC Toggled output mode once the output toggled it will hold h...

Page 58: ... initialvalue of counter from the counter set value register Base Add 18h The counter output mode may be obtained with the TC output mode or the TC toggled output mode by specifying in the Counter Mode register CM5 CM4 Toggled output uses the trailing edge of TC to toggle a flip flop to generate an output level instead of a pulse During the TC Toggled output mode it will hold high output level and...

Page 59: ...unt to TC repetitively The counter will count all source edges that occurred while the gate high level is active and disregard those edges that occurred while the gate is inactive On each TC the counter will reload the initialvalue of counter from the counter set value register Base Add 18h The counter output mode may be obtained with the TC output mode or the TC toggled output mode by specifying ...

Page 60: ...uring the TC toggled output mode it will hold high output level and ignore the following TCs until users clear the toggled output by writing the Bit1 of count reset register Base Add Eh If Bit0 of the count reset register is Logic 1 write logic 0 into the Bit1 of count reset register users can clear the toggle output ...

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